Patents Assigned to Rixon, Incorporated
  • Patent number: 3946214
    Abstract: A multi-level digital filter system applicable to modems is provided. The incoming data is read serially into M shift registers and read out in parallel by M further shift registers under the control of an M-bit clock, where M=log.sub.2 N and N is the number of levels. After appropriate conditioning by a logic control circuit, the parallel outputs are filtered separately by M digital shaping filters. The shaping filters each comprise a chain of shift registers the outputs of which are weighted by a resistor network and summed to produce a desired time response, which in an exemplary embodiment is the inverse Fourier transform of an ideal low-pass filter. Summing of the filter outputs produces an N-level signal. Specific examples of three-, four-, five-, six- and eight-level systems are disclosed.
    Type: Grant
    Filed: September 17, 1974
    Date of Patent: March 23, 1976
    Assignee: Rixon, Incorporated
    Inventors: Richard L. Stuart, Arvind M. Bhopale