Patents Assigned to ROBUST CHIP INC.
  • Soft Error Hard Electronics Layout Arrangement and Logic Cells
    Publication number: 20130162293
    Abstract: A method is disclosed for creating a logic integrated circuit cell from an original logic integrated circuit gate. The method includes combining the original logic integrated circuit cell with a second circuit which takes as input a complement of inputs of the original logic integrated circuit cell and provides as output complements of the output of the original logic integrated circuit cell.
    Type: Application
    Filed: December 3, 2012
    Publication date: June 27, 2013
    Applicant: ROBUST CHIP INC.
    Inventor: ROBUST CHIP INC.