Patents Assigned to ROCKETICK TECHNOLOGIES LTD.
  • Patent number: 9684494
    Abstract: A computing method includes accepting a definition of a computing task, which includes multiple Processing Elements (PEs) having execution dependencies. The computing task is compiled for concurrent execution on a multiprocessor device, by arranging the PEs in a series of two or more invocations of the multiprocessor device, including assigning the PEs to the invocations depending on the execution dependencies. The multiprocessor device is invoked to run software code that executes the series of the invocations, so as to produce a result of the computing task.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: June 20, 2017
    Assignee: ROCKETICK TECHNOLOGIES LTD.
    Inventors: Shay Mizrachi, Uri Tal, Tomer Ben-David, Ishay Geller, Ido Kasher, Ronen Gal
  • Patent number: 9128748
    Abstract: A method includes accepting a simulation task for simulation by a simulator that controls multiple co-simulators. Each of the multiple co-simulators is assigned to execute one or more respective sub-tasks of the simulation task. The simulation task is executed by invoking each co-simulator to execute the respective assigned sub-tasks.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: September 8, 2015
    Assignee: ROCKETICK TECHNOLOGIES LTD.
    Inventors: Shay Mizrachi, Uri Tal, Tomer Ben-David, Ishay Geller, Ido Kasher
  • Patent number: 9087166
    Abstract: A method for design simulation includes partitioning a verification task of a design (100) into a first plurality of atomic Processing Elements (PEs-108) having execution dependencies (112), each execution dependency specifying that a respective first PE is to be executed before a respective second PE. The method further includes computing an order for executing the PEs on a multiprocessor device (32), which includes a second plurality of processors (44) operating in parallel and schedules the PEs for execution by the processors according to a built-in scheduling policy. The order induces concurrent execution of the PEs by different ones of the processors without violating the execution dependencies, irrespective of the scheduling policy. The PEs are executed on the processors in accordance with the computed order and the scheduling policy, to produce a simulation result. A performance of the design is verified responsively to the simulation result.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: July 21, 2015
    Assignee: ROCKETICK TECHNOLOGIES LTD.
    Inventors: Uri Tal, Shay Mizrachi, Tomer Ben-David
  • Publication number: 20140379320
    Abstract: A method for design simulation includes partitioning a verification task of a design (100) into a first plurality of atomic Processing Elements (PEs-108) having execution dependencies (112), each execution dependency specifying that a respective first PE is to be executed before a respective second PE. The method further includes computing an order for executing the PEs on a multiprocessor device (32), which includes a second plurality of processors (44) operating in parallel and schedules the PEs for execution by the processors according to a built-in scheduling policy. The order induces concurrent execution of the PEs by different ones of the processors without violating the execution dependencies, irrespective of the scheduling policy. The PEs are executed on the processors in accordance with the computed order and the scheduling policy, to produce a simulation result. A performance of the design is verified responsively to the simulation result.
    Type: Application
    Filed: April 28, 2014
    Publication date: December 25, 2014
    Applicant: ROCKETICK TECHNOLOGIES LTD.
    Inventors: Uri Tal, Shay Mizrachi, Tomer Ben-David
  • Publication number: 20110191092
    Abstract: A method includes accepting a simulation task for simulation by a simulator that controls multiple co-simulators. Each of the multiple co-simulators is assigned to execute one or more respective sub-tasks of the simulation task. The simulation task is executed by invoking each co-simulator to execute the respective assigned sub-tasks.
    Type: Application
    Filed: April 12, 2011
    Publication date: August 4, 2011
    Applicant: ROCKETICK TECHNOLOGIES LTD.
    Inventors: Shay Mizrachi, Uri Tal, Tomer Ben-David, Ishay Geller, Ido Kasher
  • Publication number: 20110067016
    Abstract: A computing method includes accepting a definition of a computing task (68), which includes multiple atomic Processing Elements (PEs—76) having execution dependencies (80). Each execution dependency specifies that a respective first PE is to be executed before a respective second PE. The computing task is compiled for concurrent execution on a multiprocessor device (32), which includes multiple processors (44) that are capable of executing a first number of the PEs simultaneously, by arranging the PEs, without violating the execution dependencies, in an invocation data structure (90) including a second number of execution sequences (98) that is greater than one but does not exceed the first number. The multiprocessor device is invoked to run software code that executes the execution sequences in parallel responsively to the invocation data structure, so as to produce a result of the computing task.
    Type: Application
    Filed: June 30, 2009
    Publication date: March 17, 2011
    Applicant: ROCKETICK TECHNOLOGIES LTD.
    Inventors: Shay Mizrachi, Uri Tal, Tomer Ben-David
  • Publication number: 20100274549
    Abstract: A method for design simulation includes partitioning a verification task of a design (100) into a first plurality of atomic Processing Elements (PEs-108) having execution dependencies (112), each execution dependency specifying that a respective first PE is to be executed before a respective second PE. The method further includes computing an order for executing the PEs on a multiprocessor device (32), which includes a second plurality of processors (44) operating in parallel and schedules the PEs for execution by the processors according to a built-in scheduling policy. The order induces concurrent execution of the PEs by different ones of the processors without violating the execution dependencies, irrespective of the scheduling policy. The PEs are executed on the processors in accordance with the computed order and the scheduling policy, to produce a simulation result. A performance of the design is verified responsively to the simulation result.
    Type: Application
    Filed: March 25, 2009
    Publication date: October 28, 2010
    Applicant: ROCKETICK TECHNOLOGIES LTD.
    Inventors: Uri Tal, Shay Mizrachi, Tomer Ben-David