Abstract: A broadband phase-shifting circuit, in particular for an IQ modulator, has two phase-shifting branches connected in parallel, to the input of which is supplied the input signal of which the phase is to be shifted, and which supply at their outputs output signals of which the phase is shifted over a predetermined angle, in particular of 90°. The phase shifter of one phase-shifting branch is controlled depending on the frequency of the input signal in such a way that the phase angle between the two output signals approximately corresponds to the desired value (coarse control), whereas the phase shifter of the other phase-shifting branch is set to the desired phase angle (fine regulation by a phase detector connected between the outputs of the two phase-shifting branches.

Abstract: The arrangement is for optimization of data transmission via a bi-directional radio channel in which respective types of modulation can be selected at the transmitter side and the code rate of the forward error correction (FEC) as well as the power of the transmitter Devices (CRC) are provided at the reception side for determination of the error rate. The size of the data packets, and/or the type of modulation, and/or the code rate, and/or the power of the transmitter is varied, dependent on the error rate transmitted back, such that a predetermined error rate is achieved at the reception side.

Abstract: An equalizer for automatically equalizing a high-frequency power amplifier having a reference carrier generator which generates a reference carrier from a measured input signal of the high-frequency power amplifier, and a first synchronous demodulator while generating an input envelope curve from the measured input signal and from the reference carrier. A second synchronous demodulator which generates an in-phase component of an output envelope curve from the measured output signal of the high-frequency power amplifier and from the reference carrier, as well as a phase shifter which shifts the phase of the reference carrier 90° are also provided. A third synchronous demodulator generates a quadrature component of the output envelope curve from the measured output signal of the high-frequency power amplifier and from the reference carrier that has been shifted 90° in phase.

Abstract: For determination of the transmission function of a measurement apparatus, in particular of a spectrum analyzer, a calibration signal, modulated with a modulation signed such that a line spectrum arises within the frequency band of interest is provided in the measurement apparatus. In a computer, the modulation signal is calculated from the digitized output signal of the measurement apparatus. The desired transmission function is then calculated therefrom according to magnitude and phase.

Abstract: In a network analyzer having one or two test ports each of which is connected via fourports to measuring points the measured values of which are analyzed in an evaluation means that includes a memory for storing system errors which have been determined during a calibration operation and must be taken into account for the object measurement, there is provided a calibration twoport between at least one of said test ports and said fourport of the associated measuring points, said calibration twoport being adapted to be switched from a basic state to two further switching states, and said calibration twoport differs in one of said further switching states from the basic switching state at least in transmission and in the other one of said further switching states differs at least in reflection from the basic switching state.

Abstract: For the continuous and interruption-free readout of a data sequence predetermined by a predetermined address sequence from a memory that is constructed of dynamic memory components (DRAM or SDRAM) and that is divided into a number of separately addressable memory banks, the control circuit controlling the readout of the data sequence from the memory cells is operated, and the distribution of the data in the memory cells of the banks is selected, such that another bank is respectively refreshed during the readout of data from one of the banks. The memory contains at least three memory banks and the sequence of the bank addresses is always selected such that, given access to a bank, at least the access onto the preceding bank did not exhibit the same bank address.

Abstract: In an analog-digital converter, a sine signal angle-modulated with noise or pseudonoise is used as a dither signal. The dither signal is superposed on an analog useful signal that is to be digitized. This signal is then digitized. The dither signal is then filtered out to produce the digitized useful signal.

Abstract: In a radio communication system operating according to spread-spectrum techniques, data sequences of a number of communication channels are respectively spread with different orthogonal code sequences and are subsequently multiplied by a pseudo-random noise sequence. The parallel bit streams produced by this multiplication are supplied to a mapping memory in which an allocation rule--defined by the type of modulation being employed--is stored. This mapping memory produces respectively allocated I and Q values into the mapping memory from the bits read synchronously. These I and Q values are read from the mapping memory and are filtered in respective FIR filters and are then supplied to a quadrature modulator as baseband signals. Since the mapping memory emits only two sets of values (the I values and the Q values), only two FIR filters are needed.

Abstract: For frame synchronization, the time position of a synchronization sequence in a received data stream is determined before the frequency and phase synchronization according to the principle of the maximum likelihood theory; the maximum amount of the correlation between the differentially decoded, received data sequence with the conjugated-complex, differentially decoded synchronization sequence known at the reception side is thereby taken into consideration.

Abstract: In an apparatus for EMC testing of electrical devices, conductors are arranged at opposite sides of a chamber of conductive material at a spacing from and parallel to the chamber walls. These conductors form a symmetrical double line and are fed out of phase at one end by a radio frequency source. They are electrically connected to the chamber walls at the other end via terminating impedances.

Abstract: A frequency synthesizer operating according to fractional frequency synthesis, has a phase-controlled oscillator, a phase detector that controls this oscillator, a loop filter arranged in a control line between the phase detector and the oscillator, a reference frequency source and a frequency divider arranged between this reference frequency source and one input of the phase detector, which frequency divider can be adjusted to whole-number division ratios. The frequency synthesizer also has an adjustment device that operates with multiple integration, by which the whole-number division ratio of the frequency divider is controlled such that a fractional division ratio corresponding to a desired fractional rational division ratio is simulated. The other input of the phase detector is connected with the output of the oscillator via a mixer, wherein a difference is formed of the output frequency of the oscillator and the reference frequency of the reference frequency source.

Abstract: For measuring electronic devices under test with a network analyzer, the electronic devices to be embedded into a linear auxiliary network during their operation, as well as, during the measurement. First, system error correction data is determined for the network analyzer according to a known calibration method by connecting calibration standards. Then, the characteristic data for the auxiliary network to be used is determined and is linked with the system error correction data to form new error correction simulation data. Finally, in the subsequent measurement of devices under test connected to the network analyzer, this error correction simulation data is appropriately considered with the algorithm for system error correction that is present in the network analyzer, so that an auxiliary network virtually connected to the device under test is simulated.

Abstract: In a network analyzer for the measurement of frequency-dependent measurement parameters of an object undergoing measurement, the waiting period at which the locked oscillator is switchable between the successive frequency measurement points is controlled in dependence on the comparison of at least two immediately successive measurement results at the same measurement point.

Abstract: In a method for calibrating a network analyzer having two test ports and at least four measuring locations according to the fifteen-term principle, correction values that are taken into consideration in the following subject measurements are calculated by successive measurement of the transmission and reflection parameters at five calibration standards that are successively connected in arbitrary sequence between the two test ports. A one-port network having a known impedance or open circuit is used as a calibration standard for the first calibration measurement. It is being successively connected to the two test ports (MM or OO double one-port network calibration) and four calibration standards are used for the other four calibration methods. Only eleven of the total of sixteen scatter parameters of these four calibration standards are known, whereas the remaining, five unknown scatter parameters are subsequently calculated from the total of measured values.

Abstract: A method calibrates a network analyzer having two test ports and at least four measuring locations by successive measurement of the transmission and reflection parameters at three calibration standards successively connected in arbitrary sequence between the two test ports according to the seven-term principle. A first calibration measurement is implemented at an electrical line whose characteristic impedance is known and whose electrical propagation constant may be unknown and complex. Second and third calibration measurements are then respectively implemented at a two-port that is connected between the test ports and is constructed of concentrated components. The electrical propagation constant of the line and correction values that are taken into consideration in following object measurements are calculated from these measured values.

Abstract: For calibrating a network analyzer having two test ports by successive measurements of the transmission and the reflection parameters on a plurality of calibration standards in any desired order, from which correction values are then calculated that are taken into account in subsequent measurements of a device-under-test, at least five successive calibration measurements with predetermined calibration standards or calibration standards in the form of discrete components according to basic predetermined circuits are performed. A total of 15 correction values is then calculated from the measured values obtained with these calibration standards.

Abstract: For calibrating a network analyzer which has two test ports adapted to be connected to an object under test by means of lines or through free-space, the transmission and reflection parameters are measured in a first calibrating measurement either on a line which is connected in reflection-free fashion between the two test ports or on the free-space connection. Subsequently two or three further calibrating measurements are performed with the same free-space connection or the same line, respectively, on calibration standards which are implemented by reflection-symmetrical and reciprocal interfering objects or discontinuities inserted at two or three different positions in the free-space connection or the line, respectively.

Abstract: In a broadband amplifier having an upper limit frequency of several GHz that is composed of a plurality of transistors connected in parallel, the control terminals (gates) of the transistors are respectively connected to line sections of an input line via an input circuit composed of a plurality of capacitors and appertaining resistors connected in parallel. Outputs (drain terminals) of the transistors are respectively connected to line sections of an output line.

Abstract: For the purpose of transmitting digital audio signals from recording studios to the various broadcasting stations of a broadcasting network, the data flow of the digital audio signals to be transmitted is initially reduced in accordance with a technique which utilizes the psychoacoustic phenomena of the human ear. Then groups of these data-reduced digital audio signals are respectively encoded in a baseband in accordance with a DS1-technique and combined to form respective DS1/M-signals. Finally, the thus produced DS1/M-signals are transmitted in accordance with the DSR technique by use of a wide-band transmission system to the individual broadcasting stations of the broadcasting network.

Abstract: In a method of calibrating a network analyzer, in which calibration measurements are performed in succession in a random sequence on several different calibration standards which are linked to the two test ports, the first calibration standard used is a two-port unit which is linked between the two test ports and of which all complex scattering parameters are known, and the further calibration standards used are three one-port units of random, though different, reflection characteristics which are successively linked to one of the two test ports, or are linked in any desired combination to both test ports.