Abstract: A DC to DC converter employs a push-pull oscillator which employs a transformer having a primary winding and a plurality of secondary windings. The transformer has a core which is of a square loop hysteresis type. The push-pull oscillator is supplied operating voltage by means of a voltage regulator circuit which operates to regulate the voltage applied to the push-pull oscillator according to both input voltage variations and output load variations. An output secondary winding of the transformer is coupled to a full wave rectifier. The full wave rectifier output is fed back to the regulator to control the voltage applied to the push-pull oscillator via the regulator. Due to circuit operation, the output voltage is extremely well regulated while having low ripple.
Abstract: An improvement in a bus where the propagation time between two of the transmitters on the bus is appreciable compared to the period of the bus cycles. High impedance drivers are used by the transmitters to permit signals on the bus to be superimposed on one another. This permits signals from one transmitter to be propagated even when that transmission occurs while another signal is propagating past that transmitter.
Abstract: A pair of integrated circuits are described which provide a digital link between a branch exchange and a voice and data channel using an ordinary twisted pair. The downlink circuit permits coupling to a serial asynchronous port of different protocol than that used over the link and for instance, this port may be coupled to a keyboard, display or data terminal.
Abstract: An improved architecture for a computerized branch exchange particularly for a time division multiplexed bus used in the exchange. An intershelf bus includes a unidirectional source bus which receives signals from expanders and a unidirectional destination bus which transmits signals to the expanders. The expanders, through another bus, communicate with line cards which interface with telephone station sets, commercial lines, etc. A time division multiplexed controller updates distributed connection tables contained in each of the expanders and controls the flow of data onto and from the unidirectional buses. The distributed connection tables eliminate the need to broadcast addresses during each time slot. The arrangement is particularly useful in reducing blocking associated with prior art bidirectional buses.
May 22, 1984
Date of Patent:
December 2, 1986
Howard W. Johnson, Michael G. Duncan, Rod G. Sinks, John D. Edwards, Martin H. Graham, James M. Kasson, Charles M. Corbalis
Abstract: A circuit for converting an AC potential to a regulated DC potential which circuit consumes a minimum of power and is relatively inexpensive to build is described. A capacitor is used to couple the AC potential to a rectifier. The duration of current flow through the capacitor is controlled to obtain the regulation. An on or off switching device is used such as an SCR, eliminating the current flow regulation devices often used in regulative power supplies. The invented circuit is particularly useful for providing a regulated DC potential in a switching power supply.
Abstract: The power supply of the present invention simultaneously provides multiple regulated power outputs for the digital circuitry within CRT terminals and a stable current sawtooth waveform suitable for driving a magnetic deflection yoke. The power supply comprises a high voltage transformer connected to a horizontal yoke to drive the CRT beam and a low voltage transformer which drives a microprocessor, communication circuitry, and the various other components of the power supply circuit. There is only one set of control switching, start up and protection components that drive the high voltage and low voltage transformers. The power supply provides a horizontal sync signal which is always locked onto the CRT monitor and also provides a steady voltage output to drive the CRT microprocessor.
Abstract: An apparatus for interconnecting switching modules, such as PBXs, of the time division multiplexing type is disclosed. An intertie termination unit is employed which allows signals to be effectively routed through the modules without using the primary TDM bus within the modules. The modules are interconnected in a carousel arrangement which provides substantial economic and reliability advantages over hierarchical architecture and over systems employing a combination of direct links and buses.
Abstract: This invention is a data line interface providing a parallel to serial conversion technique for selectively increasing serial data transmission rates. The data line interface receives a 16-bit data word or signal from a TDM bus and transmits it serially to one of a plurality of data terminal interfaces depending on which one is selected. The invention utilizes a double buffer receiver circuit to determine when to speed up the destination transmission clock.The asynchronous data line interface looks at the value of each of the bits in the data word by sampling the center of each bit. However, during the stop bit, it will not look at the value after sampling the center. Thus, during the time that would have been devoted to the last half of the stop bit, a new start bit may be accepted, allowing the speed up of data to occur.
Abstract: A sensor having a particular application in the field of signature verification is disclosed. In the presently preferred embodiment, two plates are disposed in a spaced apart relationship and constructed to provide a plurality of electrical capacitors. Pressure applied at any point on one plate will cause deflection of that plate toward the other plate changing the capacitance of each capacitor. The change in capacitancegenerates electrical signals which may be combined and processed to provide signals indicative of the location on the plate at which the pressure was applied and indicative of the magnitude of its vertical component. In an alternate embodiment, first and second spaced apart parallel lines are disposed on one plate with a third ground line interlaced between the first and second lines. A voltage is applied across the first and second lines and the capacitance between the first and second lines is measured as a function of the distance between the plates.
Abstract: A phase-locked loop for use in the common T1 systems. The phase relationship of the clock pulse output of a voltage controlled oscillator is determined with respect to an incoming data pulse train. If the clock signal leads the data signal, an error signal of a first polarity is applied to an integrator whose output is provided to the VCO to reduce the frequency of the clock pulse. If the clock signal lags the data signal, an error signal of a second polarity is applied to the integrator whose output is provided to the VCO to increase the frequency of the clock pulse. The logic of the circuitry is such that the output of the integrator is always either increasing or decreasing, even if there is zero phase error between the clock pulse and data pulse (i.e. the loop has infinite gain for zero error). The integrator continues to integrate in a first direction until the frequency of the clock pulses is adjusted so far that the lead is changed to a lag or vice-versa, with respect to the next data pulse.
Abstract: A high speed bus structure is described which employs an ordinary flat ribbon cable. ECL receivers are coupled to conductor pairs of the cable through resistors which change the capacitive load of the ECL receivers to a resistive load. The receivers are coupled to the cable through a plurality of connectors having spaced-apart pins. The pins in each connector engage less than all of the conductor pairs, thus a plurality of connectors are required to completely couple receivers to all the conductors in the cable. This connector arrangement substantially reduces the parasitic capacitance loading on the cable. The invented high speed bus is able to effectively function at 100 MHz with 80 feet of cable and with 16 receivers coupled to each conductor pair.
Abstract: An inductively coupled sensing circuit for use on a common cable communications system is disclosed. When used in conjunction with transceivers on a common cable system, the circuit is capable of both detecting signals and determining the direction of any colliding signals while the transceiver is operating. An inherently balanced bridge is created by coupling the transmitter lead between two elements of the sensing circuit. Each receiver is provided with means for determining the polarity of the sensing circuit, thereby determining the direction of any incoming signal. The use of this sensing circuit in a common cable system allows a hierarchy among cable users to be created thereby optimizing cable use. A left or right priority is determined by the polarity of an end signal transmitted at the end of each transmission.
Abstract: An improved transmitter/receiver for use on a common cable communications system which permits sending and receiving of data at multiple data rates. Each transmitter first transmits a message alerting the intended receiver. The message also informs the receiver of the rate at which data is to be transmitted. This data rate is a function of the available bandwidth between the transmitting transmitter and receiving receiver. Each transmitter includes a memory of such bandwidth for all receivers on the cable.
Abstract: A distributed CBX system which provides a virtual network between remotely located CBXs is disclosed. The CBXs are connected to both a voice network and a packet network. A first CBX may interrogate a second CBX to determine, by way of example, the status of a called station at the second CBX over the packet network. The second CBX not only provides the status of the called station but also provides, if the called station is clear, the number of a free incoming line at the second CBX. In this manner, the first CBX can place a call to both an available line and station at the second CBX. Alternatively, because of facility availability or tariff structures, the call may be originated over common carrier facilities in the reverse direction originating over common carrier facilities from the called party end.
February 19, 1980
Date of Patent:
January 26, 1982
Michael D. Jabara, Charles H. Jolissaint, David Lieberman, John D. Edwards
Abstract: An improved telephone station set for use with a switching system which senses flashing is disclosed. A separate flash key is included on the set. Depression of the flash key causes decoupling of the set for a predetermined time which corresponds to the flash window. Depression of the hook switch, assures decoupling of the set for a sufficiently long period of time so that a hang-up is detected even if the hook switch is immediately released.
Abstract: Undesired oscillations in a communications conferencing network are reduced and/or eliminated by frequency shifting signals passing through the conferencing network by a small amount for each pass therethrough.Electrical information signals from a plurality of individual communication sets are individually summed, frequency shifted by a predetermined amount, and coupled back to individual ones of the communication sets, less their individual signal contributions. Frequency shifting is performed on analog electrical information signals by modulating the sum signals, filtering the modulated signals and remodulating the filtered signals with a second carrier signal train having a frequency which differs from the frequency of the first carrier signal train by a predetermined amount, and filtering the signals resulting from the second modulating step.
Abstract: An interface between a telephone switch bus line and a dual tone multiple frequency (DTMF) type digital tone decoder is provided which minimizes false tone decoding due to filter-induced transient oscillations caused by spurious impulse noise and the like on the input bus line. The interface includes a limiter circuit for generating a uniform amplitude output pulse train and a circuit for automatically generating a variable threshold which is time responsive to input signals on the input bus line. The variable threshold circuit output signals are used by the limiter circuit to mask transient oscillations in the tone filter output. Only when persistence of the oscillations wherein the limiter threshold level signal is finally less than the peak amplitude of the input signals to the limiter from the tone filter will such input signals be sensed as valid switching tone signals.
Abstract: In a digital information transmission system having an analog-to-digital converter (ADC), an information transmission medium, and a digital-to-analog converter (DAC) all located between a transmitting station and a receiving station, signal transmission is improved by injection of a controlled signal in the form of a symmetric triangle wave sweep having a maximum peak-to-peak amplitude exceeding the magnitude of a few quantization intervals of the ADC and the DAC, introducing frequency components concentrated outside the system frequency spectrum. A class of controlled signals is disclosed. In the preferred embodiment, the controlled signal is injected into the analog information input signal prior to conversion to digital form.
Abstract: A queuing technique for message communication systems having a plurality of caller handsets and multiple tariff communication links.In response to toll call requests, the lowest tariff links are scanned for availability. If no such link is available, a request is stored in a finite time, fixed storage queue, and the lowest tariff links are repeatedly scanned for availability. If no such link becomes available within a predetermined maximum time period, or if the number of requests stored in the queue exceeds a predetermined maximum number, the next lowest tariff links are scanned and the caller handset corresponding to the oldest stored request is connected to an available one of such links. If none of the next lowest tariff links are available, the oldest caller is connected to one of the regular tariff links.A second queue may be added between the next lowest tariff link group and the regular tariff link group to provide serial tandem queues or serial concatenated queues.