Patents Assigned to S.A.R.L.
  • Patent number: 6476664
    Abstract: The integrated device comprises a PMOS transistor and a voltage selector having an output connected to the bulk terminal of the PMOS transistor. The voltage selector comprises an input stage supplying a supply voltage or a programming voltage according to whether the device is in a reading step or in a programming step; a comparator connected to the output of the input stage, receiving a boosted voltage, and generating a first control signal, the state whereof depends upon the comparison of the voltages at the inputs of the comparator; a logic circuit connected to the output of the comparator and generating a second control signal, the state whereof depends upon the state of the first control signal and of a third-level signal; and a switching circuit controlled by the first control signal, by the second control signal, and by the third-level signal and supplying each time the highest among the supply voltage, the boosted voltage, and the programming voltage.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: November 5, 2002
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Paolo Rolandi, Massimo Montanaro, Giorgio Oddone
  • Patent number: 6474041
    Abstract: A method for packaging objects by the use of heat-shrink material, in which there is wrapped in the manner of a sleeve around the objects, a sheet of heat-shrink material, heated to a temperature which is at least equivalent to the “defrosting” temperature of the material, a front portion and a rear portion of the sheet being disposed overlapping one another, in which the two portions are welded to one another, and in which the object-sheet assembly obtained is allowed to cool until the sheet shrinks onto the object.
    Type: Grant
    Filed: December 6, 1999
    Date of Patent: November 5, 2002
    Assignee: Baumer S.R.L.
    Inventor: Mario Gambetti
  • Patent number: 6476949
    Abstract: An optical transmission apparatus for transmission of optical signals at an optical wavelength of about 1550 nanometers. The optical transmission apparatus includes a single mode optical fiber link formed of optical fiber having substantially zero dispersion at an optical wavelength of about 1300 nanometers and a dispersion of about 17 picoseconds per nanometer-kilometer at an optical wavelength of about 1500 nanometers. Further, at least one dispersion compensating chirped optical fiber grating is coupled to the optical fiber link, the aggregate dispersion of the at least one dispersion compensating chirped optical fiber grating substantially compensating for the dispersion of the optical fiber link. Further, the at least one dispersion compensating chirped optical fiber grating is coupled at respective positions substantially symmetrically disposed about the longitudinal center of the optical fiber link.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: November 5, 2002
    Assignee: Cisco Photonics Italy S.r.L.
    Inventors: Wei-Hung Loh, Richard Ian Laming, David Atkinson, John James O'Reilly
  • Patent number: 6476922
    Abstract: The apparatus comprises: a holder for a test piece; at least two optical systems, identifying two optical paths located at a predetermined and known reciprocal distance, which are able to focalize, with a predetermined degree of magnification, images of two ends of the test piece; the at least two optical systems being aligned with the holder; at least one viewing and measuring device able to collect the images which are focalized by the at least two optical systems. The apparatus is structured to perform measurement of a size of a test piece while completely eliminating any influence on such measurement on the part of the holder or the measuring system.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: November 5, 2002
    Assignee: Expert System Solution S.r.L.
    Inventor: Mariano Paganelli
  • Patent number: 6477625
    Abstract: A method for reading a memory by applying control signals. The control signals include a memory enable signal, a visibility signal, and a read signal. By applying the control signals to the memory, the memory is selectively configured into any of a plurality of cycles associated with reading the memory. The different cycles include: random read, pipeline-type random read, sequential read and suspend and wait cycles. Depending upon the cycle configuration of the memory, data is selectively emitted from the memory that coincides with the externally generated address.
    Type: Grant
    Filed: December 29, 1999
    Date of Patent: November 5, 2002
    Assignee: STMelectronics S.r.l.
    Inventors: Luigi Pascucci, Marco Fontana
  • Publication number: 20020158285
    Abstract: A process of fabricating a floating-gate memory device, the process including the steps of: forming a stack of superimposed layers including a floating gate region, a dielectric region, and a control gate region; and forming an insulating layer of oxynitride to the side of the floating gate region to completely seal the floating gate region outwards and improve the retention characteristics of the memory device. The insulating layer is formed during reoxidation of the sides of the floating gate region, after self-align etching the stack of layers and implanting the source/drain of the cell.
    Type: Application
    Filed: June 6, 2002
    Publication date: October 31, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Cesare Clementi, Gabriella Ghidini, Mauro Alessandri
  • Publication number: 20020158682
    Abstract: Bandgap type reference voltage source using an operational transimpedance amplifier. The bandgap stage is formed by a first and a second bandgap branch parallel-connected; the first bandgap branch comprises a first diode and a transistor, series-connected and forming a first output node; the second bandgap branch comprises a second diode and a second transistor series-connected and forming a second output node. The operational amplifier has inputs connected to the output nodes of the bandgap stage. An amplifier current detecting stage is connected to the outputs of the operational amplifier and supplies a current related to the current drawn by the operational amplifier. A diode current detecting stage is connected to the output of the amplifier current detecting stage and to an output of the operational amplifier and supplies a current related to the current flowing in the first diode. An output stage transforms this current into a stabilized voltage.
    Type: Application
    Filed: January 30, 2002
    Publication date: October 31, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Antonino Conte, Oreste Concepito
  • Publication number: 20020157584
    Abstract: An apparatus for inserting through a mattress tufting straps having a frame for locking said mattress, a device for inserting the tufting straps through the mattress, supported by the frame, and actuators for actuating the device to move above the mattress. The inserting device includes a magazine for tufting straps, a needle with a tip receptacle for receiving and transferring a clip through the mattress, a transfer element, with a seat for receiving the clip, and a pusher, movable transversely to the needle for engaging the clip and inserting the clip in the tip receptacle.
    Type: Application
    Filed: April 22, 2002
    Publication date: October 31, 2002
    Applicant: RESTA S.R.L.
    Inventor: Roberto Resta
  • Publication number: 20020158086
    Abstract: A unit for discharging loose material from a dispensing device to a user unit comprises a discharge tube leading to the user unit and a valve element connecting the dispensing device to the infeed end of the tube. The valve element comprises a first annular element equipped with a shutter device, consisting of a first shutoff element and a second shutoff element connected to each other by permanent magnets, and a second annular element connected to the infeed end of the tube. When the first and second annular elements are separated by the operation of pistons, a gap is created between the two shutoff elements. A pair of concentric seals positioned between the first and the second annular elements isolate the gap from the outside environment so that a cleaning fluid can be made to flow into it.
    Type: Application
    Filed: April 18, 2002
    Publication date: October 31, 2002
    Applicant: ZANCHETTA & C. S.r.L.
    Inventor: Luciano Pieri
  • Patent number: 6473320
    Abstract: The voltage converter circuit has first and second input terminals, and first and second output nodes, and comprises: a first power switch connected between the first input terminal and the first output node; a second power switch connected between the first output node and the second input terminal; a first delay circuit having first and second terminals connected between the first input terminal and a control terminal of the first power switch; and a second delay circuit having first and second terminals connected between the first output terminal and a control terminal of the second power switch. Each delay circuit detects a variation in the voltage supplied on the respective first terminal and detects an operating condition of the respective power switch on the second terminal, and supplies to the control terminal of the respective power switch a switching on delay signal.
    Type: Grant
    Filed: July 17, 2001
    Date of Patent: October 29, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventor: Vincenzo Randazzo
  • Patent number: 6472750
    Abstract: A method is for forming an intermediate dielectric layer to optimize the planarity of electronic devices integrated on a semiconductor which incorporate non-volatile memories. The insulating dielectric is deposited from a liquid state source comprising silicon oxides and organics of the resist type. The liquid dielectric layer is evenly spread by a spinning technique providing good levels of planarity. Solidification, referred to as polymerization, is achieved through a low-temperature thermal cycle. Since this dielectric layer cannot be used as such to isolate the semiconductor substrate from the overlying metallization plane on account of the presence of organics forming a source of impurities, it is arranged for the layer to be encapsulated between two dielectric layers of silicon oxide as deposited from a plasma.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: October 29, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Patrizia Sonego, Maurizio Bacchetta
  • Patent number: 6472782
    Abstract: A drive spindle is provided with an electric motor, an output shaft of which defines a tool-bearing spindle rotatable about a longitudinal axis, and with a cooling device for the electric motor; the cooling device having an impeller mounted for rotation about the longitudinal axis of the spindle so as to generate a substantially helical airflow coaxial of the spindle itself, and a static deflector for directing the airflow from the impeller towards the electric motor along a direction substantially parallel to the longitudinal axis of the spindle.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: October 29, 2002
    Assignee: H.S.D. S.r.l.
    Inventor: Giancarlo Selci
  • Patent number: 6470715
    Abstract: The dyeing apparatus for carrying out laboratory tests comprises a dyeing chamber which can be sealingly coupled to at least one portion of the fabric to be dyed, means being additionally provided for displacing the dyeing liquid, adapted to carry out a sequence of alternate passages of the dyeing liquid through said fabric to be dyed.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: October 29, 2002
    Assignee: Color Service S.r.l.
    Inventors: Fabrizio Toschi, Antonello Turle
  • Patent number: 6472066
    Abstract: Low shrinkage, short-cut polyethylene terephthalate fiber exhibiting dispersibility suitable for incorporation into wet laid non-woven products is produced through the use of steam-annealing. The preferred fibers exhibit a hot air shrinkage value of less than about 10 percent, have a length of less than 3 inches, and a dispersion index of less than 5.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: October 29, 2002
    Assignee: Arteva North America S.A.R.L.
    Inventors: Glen Patrick Reese, Gary William Cooper
  • Patent number: 6473339
    Abstract: A redundancy architecture for a memory includes an array of memory cells divided into at least a pair of semi-arrays that are singularly addressable. Each semi-array is organized into rows and columns. The redundancy architecture includes a number of packets each including redundancy columns. The packets are divided into two subsets of packets. Each packet is addressable independently from the other by respective address circuits. Each packet also provides redundancy columns exclusively for a respective semi-array.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: October 29, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luca Giuseppe De Ambroggi, Fabrizio Campanale, Salvatore Nicosia, Francesco Tomaiuolo, Promod Kumar
  • Patent number: 6472244
    Abstract: The method inlcudes the steps of forming a sacrificial buried region of insulating material on a substrate of monocrystalline semiconductor material, epitaxially growing a first semiconductor material layer on the substrate, the first semiconductor material layer including a polycrystalline region over the sacrificial buried region and a monocrystalline region elsewhere, the substrate and the semiconductor material layer surrounding the sacrificial buried region on all sides, and removing the sacrificial buried region. The portion of the polycrystalline region surrounded by the trench thus forms a suspended structure separated and isolated thermally from the rest of the semiconductor material layer. Using microelectronics processes, electronic components are formed in the monocrystalline region, and dedicated regions are formed at the suspended structure, so that the electronic components are integrated in the same chip with static, kinematic or dynamic microstructures.
    Type: Grant
    Filed: November 27, 2000
    Date of Patent: October 29, 2002
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Paolo Ferrari, Benedetto Vigna, Flavio Villa
  • Patent number: 6472257
    Abstract: The integrated inductor comprises a coil of metal which is formed in the second metal level. The coil is supported by a bracket extending above spaced from a semiconductor material body by an air gap obtained by removing a sacrificial region formed in the first metal level. The bracket is carried by the semiconductor material body through support regions which are arranged peripherally on the bracket and are separated from one another by through apertures which are connected to the air gap. A thick oxide region extends above the semiconductor material body, below the air gap, to reduce the capacitive coupling between the inductor and the semiconductor material body. The inductor thus has a high quality factor, and is produced by a process compatible with present microelectronics processes.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: October 29, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Paolo Ferrari, Armando Manfredi, Benedetto Vigna
  • Patent number: 6470923
    Abstract: A device for program-controlled variation of the composition of a gaseous mixture for inflating a tire for performing the method, comprising a first source of at least one main gas, a second source of at least one additional gas, at least one first compressor suitable for compressing to a preset pressure a gaseous mixture of at least said main gas and additional gas, at least one dispenser of compressed mixture which is connected to the delivery of said compressor, and further comprising at least one mixer for said at least one main gas and said at least one additional gas which is suitable for delivering a gaseous mixture having a desired composition, a gas analyzer means arranged downstream of said mixer, valve means for controlling the flow between said mixer and said first and second gas sources, and program control means arranged to control said valve means in response to control signals from said analyzer means.
    Type: Grant
    Filed: July 19, 2000
    Date of Patent: October 29, 2002
    Assignee: Butler Engineering & Marketing S.r.l.
    Inventor: Tullio Gonzaga
  • Patent number: 6473310
    Abstract: The invention includes a multichip integrated circuit package having at least two chips electrically isolated from one another. Within the multichip integrated circuit package is a slug that is directly coupled to at least two chips, without any intervening insulating layers. The slug is physically separated at an appropriate place between the two chips, so that electrical interference between the two chips is effectively eliminated. Making the integrated circuit package begins with directly attaching the two chips to a heat dissipating slug. The heat dissipating slug can have a pre-cut groove running between the chips. Once the chips are attached to the slug, the slug is molded into the multichip integrated circuit package. Then, the slug is physically separated into two pieces from the underside, the separation running along the pre-cut groove. Usually the slug would be separated by being cut by a saw.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: October 29, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventors: Paolo Casati, Carlo Cognetti
  • Patent number: RE37898
    Abstract: Regulation of the output voltage of a power supply employing a flyback-type self-oscillating DC—DC converter employing a transformer. The primary winding circuit of the transformer senses a current recirculation loop for discharging the energy cyclically stored in an auxiliary winding of the self-oscillation loop of the converter such as to represent a replica of the circuit of the secondary winding of the transformer and by summing a signal representative of the level of the energy stored in the auxiliary winding with a drive signal on a control node of a driver of the power switch of the converter.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: November 5, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventor: Giordano Seragnoli