Patents Assigned to S hynix Inc.
  • Patent number: 11153066
    Abstract: A signal receiving device may include a high-speed receiving circuit, a low-speed receiving circuit, a low-speed synchronization circuit and a low-speed synchronization circuit. The high-speed receiving circuit receives an input signal and generate a high-speed received signal in a first operation mode. The high-speed synchronization circuit generates a high-speed synchronized signal to synchronize the high-speed received signal with a clock signal. The low-speed receiving circuit receives the input signal and generate a low-speed received signal in a second operation mode. The low-speed synchronization circuit generates a low-speed synchronized signal to synchronize the low-speed received signal with the clock signal. According to an operation mode, one of the high-speed synchronized signal and the low-speed synchronized signal is selected as an internal signal.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: October 19, 2021
    Assignee: S hynix Inc.
    Inventors: Soon Sung An, Kwan Su Shon, Jin Ha Hwang