Patents Assigned to S.O.I.Tec Silicon on Insulator Technologies S.A., a French company
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Publication number: 20060231203Abstract: Methods for transferring of a useful layer from a support are described. In an embodiment, the method includes for facilitating transfer of a useful layer from a support by providing an interface in a first support to define a useful layer; and forming a peripheral recess on the first support below the interface so that the periphery of the interface is exposed to facilitate removal and transfer of the useful layer. An epitaxial layer can be formed on the useful layer after forming the recess, with the width and depth of the recess being sufficient to accommodate the volume of residual material resulting from formation of the epitaxial layer without covering the periphery of the interface. Alternatively, an epitaxial layer can be formed on the useful layer after forming the recess, wherein the peripheral recess is configured for receiving sufficient residual material from the epitaxial layer to prevent bonding between the residual material and the useful layer.Type: ApplicationFiled: May 22, 2006Publication date: October 19, 2006Applicant: S.O.I.Tec Silicon on Insulator Technologies S.A., a French companyInventors: Fabrice Letertre, Olivier Rayssac
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Publication number: 20060204230Abstract: The invention relates to a device for use in a thermal annealing process for a wafer (T) of material chosen among the semiconductor materials for the purpose of detaching a layer from the wafer at an weakened zone, characterized in that during annealing, the device applies (1) a basic thermal budget to the wafer, with the basic thermal budget being slightly inferior to the budget necessary to detach the layer, this budget being distributed in an even manner over the weakened zone; and (2) an additional thermal budget is also applied to the wafer locally in a set region of the weakened zone so as to initiate the detachment of the layer in this region.Type: ApplicationFiled: May 16, 2006Publication date: September 14, 2006Applicant: S.O.I.Tec Silicon on Insulator Technologies S.A., a French companyInventors: Walter Schwarzenbach, Jean-Marc Waechter
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Publication number: 20060192269Abstract: A substrate-assembly having a mechanical stress absorption system. The assembly includes two substrates, one of which has a mechanical stress absorbing system, such as a plurality of motifs that absorb thermoelastic stresses, to prevent cracking or destruction of the substrates or separation of one substrate from the other.Type: ApplicationFiled: April 27, 2006Publication date: August 31, 2006Applicant: S.O.I.Tec Silicon on Insulator Technologies S.A., a French CompanyInventors: Fabrice Letertre, Bruno Ghyselen, Olivier Rayssac
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Publication number: 20060186397Abstract: A semiconductor substrate that includes a relatively thin monocrystalline useful layer, an intermediate layer transferred from a source substrate, and a relatively thick layer of a support present on one of the useful layer of the intermediate layer. The support is made of a deposited material that has a lower quality than that of one or both of the intermediate and useful layers. A bonding layer may be included on one of the intermediate layer or the useful layer, or both, to facilitate bonding of the layers an a thin layer may be provided between the useful layer and intermediate layer. These final substrates are useful in optic, electronic, or optoelectronic applications.Type: ApplicationFiled: April 12, 2006Publication date: August 24, 2006Applicant: S.O.I. Tec Silicon on Insulator Technologies S.A., A French companyInventors: Bruno Ghyselen, Fabrice Letertre
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Publication number: 20060189095Abstract: Methods for fabricating final substrates for use in optics, electronics, or optoelectronics are described. The method includes forming a zone of weakness beneath a surface of a source substrate to define a transfer layer; detaching the transfer layer from the source substrate along the zone of weakness; depositing a useful layer upon the transfer layer; and depositing a support material on the useful layer to form the final substrate. The useful layer may be deposited on the transfer layer before or after detaching the transfer layer from the source substrate. The useful layer is typically made of a material having a large band gap, and comprises at least one of gallium nitride, or aluminum nitride, or of compounds of at least two elements including at least one element of aluminum, indium, and gallium. The zone of weakness may advantageously be formed by implanting atomic species into the source substrate.Type: ApplicationFiled: April 12, 2006Publication date: August 24, 2006Applicant: S.O.I.Tec Silicon on Insulator Technologies S.A., a French companyInventors: Bruno Ghyselen, Fabrice Letertre
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Publication number: 20060138189Abstract: The invention relates to a method of splitting apart a substrate of two adjoining wafers defining between them a cleavage plane, by bringing each substrate into a substrate-receiving space; and clamping first and second jaw portions onto each substrate in such a manner as to hold each substrate and urge apart the two wafers of each substrate by co-operation between the shapes of housings in first and second portions of the two jaws, respectively. The invention also relates to a splitting method that includes bringing each substrate into a substrate-reception space; clamping together separator portions onto each substrate so as to split apart the two wafers of each substrate; and clamping the split-apart substrate wafers so as to hold the wafers together. An automated system for processing multiple substrates is also provided.Type: ApplicationFiled: January 24, 2006Publication date: June 29, 2006Applicant: S.O.I.Tec Silicon on Insulator Technologies S.A., a French companyInventors: Thierry Barge, Walter Schwarzenbach, Jean-Marc Waechter, Thuan Truong, Bruno Ghyselen
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Publication number: 20060124584Abstract: A composite structure in accordance with the invention includes front faces of first and second substrates that are molecularly bonded to each other, wherein the dimensions of the second substrate outline are larger than the first substrate outline. The front faces are molecularly bonded such that the outline of the first front face is disposed at least partially within the outline of the second front face. A peripheral ring extends around the first front face and facing the first substrate, in which bonding between the front faces is weak or absent, and has a maximum width of less than about 0.5 mm.Type: ApplicationFiled: February 7, 2006Publication date: June 15, 2006Applicant: S.O.I.Tec Silicon on Insulator Technologies S.A., a French companyInventor: Christophe Maleville
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Publication number: 20060086949Abstract: A semiconductor structure includes a substrate having a surface and being made of a material that provides atypical surface properties to the surface, a bonding layer on the surface of the substrate, and a further layer molecularly bonded to the bonding layer. A method for fabricating such a semiconductor structure includes providing a substrate having a surface and being made of a material that provides atypical surface properties to the surface, providing a bonding layer on the surface of the substrate, smoothing the bonding layer to provide a surface that is capable of molecular bonding, and molecularly bonding a further layer to the bonding layer to form the structure. The atypical surface properties preferably include at least one of a roughness of more than 0.5 nm rms, or a roughness of at least 0.4 nm rms that is difficult to polish, or a chemical composition that is incompatible with molecular bonding.Type: ApplicationFiled: December 13, 2005Publication date: April 27, 2006Applicant: S.O.I.Tec Silicon on Insulator Technologies S.A., a French companyInventors: Olivier Rayssac, Muriel Martinez, Sephorah Bisson, Lionel Portigliatti
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Publication number: 20060051944Abstract: A method for implanting atomic species through an uneven surface of a semiconductor layer. The technique includes applying a covering layer upon the uneven surface in an amount sufficient and in a manner to increase surface uniformity. The method also includes implanting atomic species through the covering layer and uneven surface to obtain a more uniform depth of implantation of the atomic species in the layer.Type: ApplicationFiled: October 31, 2005Publication date: March 9, 2006Applicant: S.O.I. Tec Silicon on Insulator Technologies S.A., a French companyInventors: Bruno Ghyselen, Takeshi Akatsu
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Publication number: 20050227456Abstract: An apparatus for cutting at least one thin layer from a substrate or ingot forming element for an electronic or optoelectronic or optical component or sensor. This apparatus includes a device for directing a pulse of energy into the substrate or forming element wherein the pulse has a duration shorter than or of the same order as that needed by a sound wave to pass through the thickness of the weakened zone, and the energy of the pulse is sufficient to cause cleavage to take place in the weakened zone as the energy of the pulse is absorbed therein. The apparatus also includes an assembly for holding or orienting the substrate or ingot forming element so that the energy pulse is completely uniformly directed over the entire surface, through the face and into the substrate or ingot forming element to cause cleavage to take place in the weakened zone as the energy of the pulse is absorbed therein.Type: ApplicationFiled: June 1, 2005Publication date: October 13, 2005Applicant: S.O.I.Tec Silicon on Insulator Technologies S.A., a French companyInventor: Michel Roche