Patents Assigned to S.O.I.TEC Solicon On Insulator Technologies
  • Method for producing partial SOI structures comprising zones connecting a superficial layer and a substrate
    Patent number: 8044465
    Abstract: The invention relates to a method for producing a semiconductor structure comprising a superficial layer, at least one embedded layer, and a support, which method comprises: a step of forming, on a first support, patterns in a first material, a step of forming a semiconductor layer, between and on said patterns, a step of assembling said semiconductor layer with a second support.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: October 25, 2011
    Assignee: S.O.I.TEC Solicon On Insulator Technologies
    Inventors: Bernard Aspar, Chrystelle Lagahe-Blanchard