Abstract: A method is disclosed of making information contents of memory-cells of a volatile semiconductor memory irretrievable. In a first step a digital pattern is generated and in a second step the information contents are overwritten with the digital pattern at least two times. The digital pattern is predefined, comprising both zeros and ones and overwrites the information contents alternately with its complementary pattern.

Abstract: The invention relates, in general, to circuits and techniques for generating numbers and, in particular, to digital semiconductor circuit for generating large numbers. For generating such large numbers a large number generator circuit is used, comprising first means having an output for providing a first operand to a first input of a processing unit, second means having an output for providing a second operand to a second input of said processing unit, an output of said processing unit being operatively connected to an input of an arithmetic unit for generating a large number, wherein said second operand is generated by said second means using a parameter having far fewer number of p bits than the number of bits of the first operand. The use of parameters of a significant shorter length of bits has been proven to be less time consuming and much faster in generating large numbers, as special operands of a significant long length of bits are no longer to be read and written from and to the memory unit.

Abstract: A data transfer device, having first data interface means for exchanging data with a data processing system, second data interface means for exchanging data with a user of the data transfer device, and control means for controlling data transfer between the first and second data interface means. The control means are configured for receiving control data from the first data interface means for selectively enabling data exchange between the first and second data interface means. The control means can be configured for enabling part of the first and second data interface means for operation in a first or open mode, and for enabling the second data interface means for operation in a second or secure mode of operation. The second data interface means may comprise Input/Output means for secure data exchange with the first data interface means under the control of program execution data operative in the data transfer device and comprised by the control data.

Abstract: A digital true random number generator circuit, comprising a linear feedback shift register having an input and an output, a system clock having a system clock frequency value for driving the shift register, and a plurality of free running oscillators operatively connected to the input of the shift register. The oscillators and the system clock having different oscillation frequency values, the greatest common divisor of which having the value one, thereby avoiding locking of the oscillators and the system clock.

Abstract: The invention relates, in general, to circuits and techniques for generating numbers and, in particular, to digital semiconductor circuit for generating large numbers. For generating such large numbers a large number generator circuit is used, comprising first means having an output for providing a first operand to a first input of a processing unit, second means having an output for providing a second operand to a second input of said processing unit, an output of said processing unit being operatively connected to an input of an arithmetic unit for generating a large number, wherein said second operand is generated by said second means using a parameter having far fewer number of p bits than the number of bits of the first operand.