Abstract: A method for building scalable electronic subsystems is described. Stackable modules employ copper substrates with solder connections between modules, and a ball grid array interface is provided at the bottom of the stack. A cooling channel is optionally provided between each pair of modules. Each module is re-workable because all integrated circuit attachments within the module employ re-workable flip chip connectors. Also, defective modules can be removed from the stack by directing hot inert gas at externally accessible solder connections.

Abstract: A method is described for combining the diverse strengths of two materials in a tiled film construction. The first material provides a foundation of intersecting grid lines on a substrate and the second material is contained within the grid lines and has a valued property for a particular application. In a preferred embodiment, a tiled dielectric layer has improved low-k dielectric performance while avoiding film stress problems that can lead to delamination or cracking. CTE mismatch is overcome at the cost of an additional masking step. This tiling method and layered binary construction enable Cytop to be used as a high performance low-k dielectric on most substrates including semiconductor wafers and copper panels or foils.

Abstract: The technology and economics of system testing have evolved to the point where a radical change in methodology is needed for effective functional testing of systems at clock rates of 1 GHz and higher. Rather than providing a test fixture to interface between the system under test and an external tester, it is preferable to provide critical testing functions within each electronic system in the form of one or more special-purpose test chips. An architecture is proposed that supports full-speed testing with improved noise margins, and also efficient methods for learning correct system behavior and generating the test vectors. The test program is preferably written using the same programming language as used for the system application.

Abstract: A tightly packed three-dimensional electronic system or subsystem comprising multiple stacks of semiconductor elements is described. The system is repairable because the elements connect together using re-workable flip chip connectors; each flip chip connector comprises a conductive spring element on one side and a corresponding well filled with solder on the other side. The spring elements relieve stresses at the interfaces and allow the component stacks to remain flat; they also provide vertical compliance for easing assembly of elements that have been imperfectly thinned or planarized. Semiconductor integration platforms may be used to integrate active and passive devices, multi-layer interconnections, through wafer connections, I/O plugs, and terminals for attachment of other semiconductor elements or cables.

Abstract: An information retrieval system includes a base station and multiple display stations. A user gives a voice command to one of the display stations and information is retrieved from the base station and displayed in real time; the information may be presented to the user both visually and aurally. The source of the information may be data stored at the base station, or data relayed by the base station from network sources such as the Internet, or from radio or television broadcast stations. The display station has a pull-down screen that can operate like a shade; it retracts using the energy in a wound-up spring.

Abstract: A method for fabricating copper-faced electronic modules is described. These modules are mechanically robust, thermally accessible for cooling purposes, and capable of supporting high power circuits, including operation at 10 GHz and above. An imprinting method is described for patterning the copper layers of the interconnection circuit, including a variation of the imprinting method to create a special assembly layer having wells filled with solder. The flip chip assembly method comprising stud bumps inserted into wells enables unlimited rework of defective chips. The methods can be applied to multi chip modules that may be connected to other electronic systems or subsystems using feeds through the copper substrate, using a new type of module access cable, or by wireless means. The top copper plate can be replaced with a chamber containing circulating cooling fluid for aggressive cooling that may be required for servers and supercomputers.