Abstract: A method of generating a fin of a FinFET includes depositing a first hard mask layer on or above a first dummy gate and a second dummy gate, generating first spacers and second spacers by etching the first hard mask layer, removing only the first spacers, depositing a second hard mask layer, generating third spacers and fourth spacers by etching the second hard mask layer, removing the first dummy gate and the second dummy gate, generating first fins using the third spacers, and generating second fins using the second spacers and the fourth spacers.
Type:
Grant
Filed:
September 20, 2016
Date of Patent:
February 13, 2018
Assignee:
Samsing Electronics Co., Ltd.
Inventors:
Sang Woo Pae, Hyun Chul Sagong, Jin Ju Kim, June Kyun Park
Abstract: The present invention relates to a simulation method and device. According to the present invention, a simulation method using a plurality of blocks comprises: a dividing step of dividing a simulation into computation operations for performing unique operations on the blocks and communication operations for data exchanges between different blocks; a grouping step of performing a grouping between the interdependent computation and communication operations; and a simulation performing step of performing an operation included in each group using the blocks according to whether or not the level of interdependency between the computation and communication operations is resolved.
Type:
Application
Filed:
July 20, 2012
Publication date:
June 5, 2014
Applicant:
Samsing Electronics Co., Ltd.
Inventors:
Kyoung Hoon Kim, Joong Baik Kim, Seung Wook Lee