Abstract: A communication system includes a hybrid signal transmitter incorporating a signal routing circuit and a driver circuit. The signal routing circuit is configured to receive a first input signal and route the first input signal through a first signal path when the frequency bandwidth of the input signal is lower than a threshold frequency and through a second signal path when the frequency bandwidth exceeds the threshold frequency. The second signal path includes a frequency down-converter circuit. The driver circuit is configured to receive the routed input signal via the first signal path or the second signal path, and convert the routed input signal into an optical signal for coupling into an optical fiber.

Abstract: Systems and methods pertaining to a digital signal isolator device are described. In one embodiment, the device includes an isolation barrier and two metal support paddles. The isolation barrier contains an organic and/or a semi-organic insulating material with at least one capacitor embedded inside. One of the two metal support paddles is located below a first portion of a bottom surface of the isolation barrier to provide support to the isolation barrier, while the other metal support paddle is located below a second portion of a bottom surface of the isolation barrier to provide support to the isolation barrier.

Abstract: Systems and methods pertaining to propagation of digital data from a transmit side domain to a receive side domain through an intermediate isolation barrier are described. Specifically, a carrier waveform is superimposed upon a first logic level of a digital signal that is referenced to a first local ground. The digital signal with the superimposed first carrier waveform is propagated through the intermediate isolation barrier. On the receive side domain, the propagated digital signal is processed using a second local ground that is different than the first local ground, the processing including the use of the carrier waveform to enforce the first logic level upon an output digital signal generated from the propagated digital signal.

Abstract: Systems, methods, and apparatuses may provide for antenna switch controllers. An example antenna switch controller may include: a plurality of antenna switches commonly connected to one or more antennas, where each of the plurality of antenna switches includes a plurality of stacked transistors, where one of the plurality of antenna switches is enabled when transmitting or receiving one or more radio frequency (RF) signals via the one or more antennas; a voltage generator that receives an external supply voltage from a battery, where the voltage generator generates an internal supply voltage, where the internal supply voltage remains constant despite fluctuations in the external supply voltage from the battery; a clock buffer that generates clock signals from the constant internal supply voltage; and a charge pump that receives the clock signals and generates a constant negative voltage, where the constant negative voltage is for biasing of one or more of the plurality of antenna switches that are disabled.

Abstract: A communication system includes a configurable transceiver that accommodates multi-band, multi-format signals by incorporating a duplex transceiver circuit, a simplex transceiver circuit and at least two switches. A first switch may be operated so as to configure the configurable transceiver to propagate duplex signals, such as for example, frequency division multiplexed (FDD) signals. The second switch may be operated so as to configure the simplex transceiver circuit to provide signal propagation of various types of signals in either a receive direction or a transmit direction. The various types of signals include time division multiplexed (TDD) signals.

Abstract: Systems and methods may include an amplifier having at least a first input port, where the amplifier includes a first capacitance associated with the first input port; a first bias circuit, where the first bias circuit comprises a series connection of a first charging circuit and a first discharging circuit, wherein a first node between the first charging circuit and the first discharging circuit is connected to the first input port, wherein responsive to an RF input signal having at least a first predetermined level being received at the first input port, the first charging circuit charges the first capacitance associated with the first input port during a first portion of a cycle of the RF input signal, and discharges the first capacitance associated with the first input port during a second portion of the cycle, thereby controlling a DC bias voltage level available at the first input port.

Abstract: Systems and methods pertaining to multi-frequency wireless power transfer are disclosed. In one exemplary implementation, a wireless charger is used to generate and transmit two wireless power charges at two different frequencies, using a frequency division multiplexed (FDM) format. A wireless sly chargeable device that is inductively coupled to the wireless charger receives the two wireless power charges in the FDM format and uses the two charges to charge one or more chargeable batteries contained in the wirelessly chargeable device.

Abstract: Systems and methods pertaining to wireless power transfer are disclosed. Specifically, disclosed herein are calibration procedures that incorporate transmission of a reference power charge from a wireless power charger to permit determination of an optimized receiver circuitry configuration in one or more wirelessly chargeable devices. The result of the calibration procedures may then be used by the wireless charger to assign various frequencies to several wirelessly chargeable devices so as to optimally transfer a steady state power charge at one or more frequencies to the wirelessly chargeable devices.

Abstract: Payment systems and methods for providing a wireless power charge are disclosed. In one exemplary implementation, a system includes a wireless charger that is used to provide a power charge to a wirelessly chargeable device. Prior to providing the power charge to the wirelessly chargeable device, the wireless charger obtains payment-related information from the wirelessly chargeable device using near field communications (NFC), and transmits this payment-related information to a payment center via a network such as the Internet. The payment center uses the information to either deny or authorize the power charge operation. If authorized, an authorization indication is provided to the wireless charger via the network, and the wireless charger then wirelessly transmits a suitable power charge to the wirelessly chargeable device.

Abstract: An analog-to-digital converter with a resolution booster is provided. The analog-to-digital converter may include a successive approximation analog-to-digital converter, a resolution booster, and an output combiner. The successive approximation analog-to-digital converter may be configured to convert an analog signal into digital data. The resolution booster may be selectively activated to enhance the resolution of the successive approximation analog-to-digital converter, and the output combiner may be configured to combine the respective outputs of the successive approximation analog-to-digital converter and the resolution booster.

Abstract: Embodiments of the invention may provide systems and methods for minimizing phase deviation and/or amplitude modulation (AM)-to-phase modulation (PM) conversion for dynamic range, radio frequency (RF) non-linear amplifiers. In order to provide high dynamic range with reduced phase error, embodiments of the invention may utilize two separate paths for processing a signal. In particular, an input signal may be sampled and divided into each path. The first signal path may be used to shape a signal, and in particular, a voltage waveform at the load. The second signal path may be used for generating negative capacitances corresponding to the voltage waveform at the load. By combining the two signals at the load, a high-dynamic range, high-frequency, non-linear amplifier can be achieved that reduces phase error resulting from amplitude fluctuations with a relatively low unity-gain frequency (fT) process.

Abstract: Embodiments of the invention may be directed to a continuous analog phase shifter for radio frequency (RF) signals, which can be integrated on a CMOS process or another compatible process where inherent process-dependent passive components such as inductors and capacitors may have low quality factors. Insertion loss degradation for a given amount of phase shift may be compensated by using an active compensation circuit/device that smartly controls negative resistance generated from the compensation circuit/device to cancel out finite resistance of a network, leading to very small insertion loss variation. According to an example aspect of the invention, improved phase linearity and increased phase shift for a given size may be obtained by incorporating the compensation circuit/device. Thus, example analog phase shifters in accordance with example embodiments of the invention may have one or more of low insertion loss variation, small size, and good phase linearity over more than a 360 degree phase shift.

Abstract: As wireless communication technology evolves, various transceivers become integrated into a single system, which implements a seamless connection to search available frequency bands and to provide wireless connections regardless of their wireless standards. One of the key technologies for seamless implementation is an ultra-wideband local oscillator, which can overcome the restriction of limited tuning range in typical RF local oscillators. Many RF oscillators incorporate LC-tuned oscillators because of their good noise performance while their tuning range is limited by fixed inductance and varied capacitance. The planar inductor fabricated on the CMOS process occupies a large area as well. By replacing the planar inductor with the array of bondwires, and including switches to provide proper impedance for the circuit to generate negative impedance, the tuning range of a CMOS voltage-controlled oscillator (VCO) is extended more than 100%, which number can not be achieved in a convention VCO.

Abstract: Systems and methods pertaining to wireless power transfer are disclosed. In one implementation, a system includes a wireless charger that is used to charge at least one wirelessly chargeable device. The wireless charger includes a master communication system and at least one wireless power charge transmitter, while the wirelessly chargeable device includes a slave wireless communication system configured at least in part, for communicating with the master wireless communication system in order to execute a wireless power charging operation. The wirelessly chargeable device further includes a wireless power charge receiver configured to receive a wireless power charge from the wireless power charge transmitter contained in the wireless charger.

Abstract: Systems and methods may include a low-dropout (LDO) voltage regulator for portable communication devices. The systems and methods may include a comparator having first and second inputs and generating a control voltage, the first input receiving a battery voltage from a battery source, the second input receiving a fixed voltage independent from the battery voltage, and a power management circuit that receives the control voltage and provides a regulated voltage based upon the control voltage, wherein when the received battery voltage is above the fixed voltage, the control voltage is provided at a high constant voltage, thereby resulting in the regulated voltage being at a first voltage, and wherein when the battery voltage is below the fixed voltage, the control voltage is provided at a low constant voltage, thereby resulting in the regulated voltage being at a second voltage less than the first voltage.

Abstract: Systems and methods for provided for linearization systems and methods for variable attenuators. The variable attenuators can include series transistors along a main signal path from the input to output, as well as shunt transistors. A bootstrapping body bias circuit can be used with one or of the series transistors to allow the body of a connected transistor to swing responsive to a received RF input signal. As the RF signal increases and affects the gate-to-source voltage difference of a transistor, a bootstrapping body bias circuit can adaptively adjust the threshold voltage of the connected transistor and compensate the channel resistance variation resulting from gate-to-source voltage swing. The bootstrapping body bias circuit can be implemented using passive elements, active elements, or a combination thereof.

Abstract: Example embodiments of the invention are directed to CMOS differential antenna switches with multi-section impedance transformation. The differential architecture can provide relief from large voltage swings of the power amplifiers by distributing the voltage stress over the receiver switch with two of the identical or substantially similar single-ended switches. In order to reduce the voltage stress further, multi-section impedance transformations can be used. Degraded insertion loss due to the impedance transformation technique can be compensated by selecting an optimal impedance for the antenna switch operation. Accordingly, the use of the multi-section impedance transformations with the differential antenna switch architecture enables high power handling capability for the antenna switch with acceptable efficiency for the transmitter module.

Abstract: Systems and methods are provided for discrete resizing of power devices. The systems and methods can include a plurality of unit power amplifiers arranged in parallel, where each unit power amplifier includes at least one first input port, at least one first output port, and a plurality of sub-power-device cells configured in parallel between the at least one first input port and the at least one first output port; a switch controller, where the controller is operative to activate or deactivate at least one of the plurality of sub-power-device cells of a respective unit power amplifier; and an output matching network, where the matching network is configured to combine respective outputs from the respective plurality of unit power amplifiers to generate a system output, wherein during an operational state, all of the plurality of unit power amplifiers contribute outputs to the matching network to generate the system output.

Abstract: A power amplifier system can include a plurality of driver amplifiers and a plurality of power amplifiers, where each driver amplifier and power amplifier includes at least one respective input port and at least one respective output port. The power amplifier system also includes a shared inductive device that provides common interstage matching between the respective output ports of the plurality of driver amplifiers and the respective input ports of the plurality of power amplifiers. The shared inductive device can be a shared inductor or a shared transformer.

Abstract: Systems and methods are provided for a transformer or balun function with reference enhancement. The systems and methods may include a transformer having at least a primary winding and a secondary winding for reference enhancement, where the primary winding includes a center tap, where the secondary winding includes a first port and a second port, and an electrical connection that electrically connects the second port and the center tap of the primary winding to provide a common reference for the primary winding and the secondary winding. The primary winding of the transformer may be configured to receive differential outputs of a power amplifier, and the transformer may be configured to convert the differential outputs from a balanced signal to an unbalanced signal available at the first port of the secondary winding.