Abstract: An electronic device includes: a host processor configured to control an operation of the electronic device; accelerators of heterogeneous hardware types configured to exchange data with each other through direct communication; and a control unit configured to convert a command received from the host processor, based on a type of each of the accelerators and transfer a result of the converting to a corresponding accelerator among the accelerators.

Abstract: Embodiments herein provides User Equipment (UE) providing beam management and method for beam recovery and beam management to be executed by the UE. The method for beam management comprises a beam failure detection, a beam reporting and a beam recovery. The present disclosure provides one or more methods for performing beam management and beam recovery when the UE is operating in multiple carriers.

Abstract: A memory device includes: a first substrate; a peripheral circuit provided on the first substrate; a first metal bonding layer provided on the peripheral circuit; a second metal bonding layer directly bonded to the first metal bonding layer; a memory cell array provided on the second metal bonding layer; and a second substrate provided on the memory cell array. A page buffer circuit in the peripheral circuit receives a verification result through the metal bonding layers, divides the verification result into stages, and sequentially outputs the verification result for the division into the stages, and a pass/failure checker in the peripheral circuit sequentially performs a counting operation about each of the stages to generate accumulated values, and compares the accumulated values and a reference value which increases from an initial value as the counting operation is performed, and the initial value is set by an external memory controller.

Abstract: An apparatus and method for user identity control are provided. The apparatus includes a communication unit, a storage unit including a unique ID and a plurality of sections, each section including different identity information, and a controller for, in response to a transaction request, transmitting a request for identity information to an authorization server via the communication unit, and for, in response to authorization information received from the authorization server, transmitting identity information to a third party to complete the transaction according to the received authorization information.

Abstract: A motion assistance apparatus includes a waist frame configured to support a waist of a user, and a proximal support configured to support a proximal part of the user. A pressure applied to a thigh of the user by the proximal support in a sitting state in which the user is sitting may be greater than a pressure applied to the thigh of the user by the proximal support in a standing state in which the user is standing upright.

Abstract: A nonvolatile memory includes; a memory cell array including memory cells commonly connected to a first signal line, a first row decoder including a first pass transistor configured to provide a driving voltage to one end of the first signal line, and a second row decoder including a second pass transistor configured to provide the driving voltage to an opposing end of the first signal line. An ON-resistance of the first pass transistor is different from an ON-resistance of the second pass transistor. A first wiring line having a first resistance connects the first pass transistor and the one end of the first signal line and a second wiring line having a second resistance different from the first resistance connects the second pass transistor and the opposing end of the first signal line.

Abstract: Various embodiments relate to an apparatus. The apparatus may include: a first printed circuit board including a first ground layer having one or more openings formed therein and a wiring layer on which a signal wire is disposed; a second printed circuit board including a second ground layer having one or more openings formed therein; a first area and a third area in which the first printed circuit board and the second printed circuit board are connected to each other via an insulating layer; and a second area, which extends from the first area to the third area, and in which the first printed circuit board and the second printed circuit board are spaced apart from each other, with an air layer interposed therebetween. Various other embodiments may be possible.

Abstract: A semiconductor package is disclosed. The disclosed semiconductor package includes a substrate having bonding pads at an upper surface thereof, a lower semiconductor chip, at least one upper semiconductor chip disposed on the lower semiconductor chip, and a dam structure having a closed loop shape surrounding the lower semiconductor chip. The dam structure includes narrow and wide dams disposed between the lower semiconductor chip and the bonding pads. The wide dam has a greater inner width than the narrow dam. The semiconductor packages further includes an underfill disposed inside the dam structure and being filled between the substrate and the lower semiconductor chip.

Abstract: An antenna device includes a first antenna, a second antenna, a barrier, and a signal processing device. The first antenna transceives a first radio frequency (RF) signal in a first communication band, and the second antenna transceives a second RF signal in a second communication band. The first antenna includes a first radiator and a second radiator having a shape symmetrical to a shape of the first radiator. The second antenna includes third and fourth radiators having shape identical to those of the first and second radiators but having a size corresponding to the second communication band. The barrier includes a penetration region, and reflects the first and second RF signals. A center frequency of the second communication band is higher than a center frequency of the first communication band, and the first and second antennas are connected with the signal processing device through the penetration region of the barrier.

Abstract: A memory device includes memory blocks, each including memory cells, and peripheral circuits that control the memory blocks and execute an erase operation for each of the memory blocks. Each memory block includes word lines stacked on a substrate, channel structures extending perpendicular to an upper surface of the substrate and penetrating through the word lines, and a source region disposed on the substrate and connected to the channel structures. During an erase operation in which an erase voltage is input to the source region of a target memory block, the peripheral circuits reduce a voltage of a first word line from a first bias voltage to a second bias voltage at a first time and reduce a voltage of a second word line, different from the first word line, from a third bias voltage to a fourth bias voltage at a second time different from the first in time.

Abstract: A semiconductor processing apparatus includes a chamber housing, an electrostatic chuck disposed in the chamber housing, the electrostatic chuck being configured to hold a semiconductor wafer, an edge ring surrounding the electrostatic chuck, the edge ring including a ring electrode disposed within the edge ring, and a ring voltage supply configured to supply a ring voltage to the ring electrode, the ring voltage having a non-sinusoidal periodic waveform, wherein each period of the non-sinusoidal periodic waveform comprises a positive voltage applied during a first time period and a negative voltage applied during a second time period, and wherein the negative voltage has a magnitude that increases during the second time period.

Abstract: A hinge assembly connecting a door of a refrigerator with a main body of a refrigerator is disclosed. The hinge assembly includes a bracket configured so that a one surface is arranged at a lower part of the door, a shaft located on the bracket and configured to be a rotational shaft of the door, and a support member rotatably arranged inserted to the shaft, and configured to support the door, and a height of a support surface supporting the door is changed according to the support member rotating based on the shaft.

Abstract: Provided is an electronic apparatus. A method of controlling the electronic apparatus includes displaying at least one sentence, when receiving a user input regarding at least one character of the at least one sentence that is displayed, analyzing the at least one sentence by using the at least one sentence including at least one character and the at least one character, selecting a character set included in the at least one sentence according to an analysis result, and displaying a selected character set to be distinguished from other characters included in the at least one sentence.

Abstract: Provided is a method of adaptively performing artificial intelligence (AI) downscaling on an image during a video telephone call of a user terminal. The method includes obtaining, from an opposite user terminal, AI upscaling support information of the opposite user terminal that is a target of a video telephone call, determining whether the user terminal is to perform AI downscaling on an original image, based on the AI upscaling support information, based on determining that the user terminal is to perform AI downscaling on the original image, obtaining a first image by AI downscaling the original image using a downscaling deep neural network (DNN), generating image data by performing first encoding on the first image, and transmitting AI data including information related to the AI downscaling and the image data.

Abstract: An electronic device is disclosed. In addition, various embodiments recognized through the specification are possible. The electronic device includes a housing, at least one antenna located in the housing, a Wi-Fi module that is electrically connected with the at least one antenna, supports a Wi-Fi protocol, and includes one core, a processor that is located in the housing and is operatively connected with the Wi-Fi module, and a memory operatively connected with the processor. The memory stores instructions, when executed, causing the processor to establish a Wi-Fi link on a first channel with an access point (AP), through the Wi-Fi module, establish a mobile hotspot link on the first channel with an external electronic device, through the Wi-Fi module, detect an event associated with a change in state of the Wi-Fi link, and change a state of the mobile hotspot link, based at least on the detected event.

Abstract: The disclosure relates to a communication scheme and system for the convergence of a 5G communication system for supporting a higher a data transfer rate after the 4G system with the IoT technology. The disclosure may be applied to intelligence services (e.g., a smart home, a smart building, a smart city, a smart car or connected car, healthcare, digital education, retail business, security and safety-related services) based on the 5G communication technology and IoT-related technology. The disclosure discloses a method and apparatus for a beam association between DL/UL.

Abstract: A method for mapping a low-dynamic range (LDR) video into a high-dynamic range (HDR) video and a device therefor are provided. The method includes a modeling process, and a mapping process. The modeling process includes training according to LDR videos of at least three different exposure levels to obtain a highlight reconstruction model and an exposure generation model, and the mapping process includes mapping an LDR video to be processed into an HDR video through the highlight reconstruction model and the exposure generation model. Accordingly, solutions to the problems of a multi-exposure synthetic image being too dark or too light is provided, and jitter in video synthesis, are provided.

Abstract: A nonvolatile memory device includes a first memory structure. The first memory structure includes first through N-th memory dies that may be connected to an external memory controller via a first channel. N is a natural number equal to or greater than two. At least one of the first through N-th memory dies is configured to be used as a first representative die that performs an on-die termination (ODT) operation while a data write operation is performed for one of the first through N-th memory dies.