Abstract: A continuous time op-amp includes a differential op-amp configured to produce, and output through output lines, output signals amplified based on a difference between input signals inputted to the differential op-amp, and a common mode feedback (CMFB) circuit configured to feed a common mode voltage back to the op-amp through a feedback line in continuous time through a capacitive coupled path, wherein the CMFB circuit includes: feedback capacitors connected between the output lines and the feedback line; switched capacitors charged based on a common mode reference voltage; and switching elements configured to control a connection between the feedback capacitors and the switched capacitors.

Abstract: An electronic device may include an image sensor, a processor, and a memory. The image sensor may include at least one photo diode, a transfer gate connecting the at least one photo diode to a first node (FD1 node), a first capacitor connected to the first node and having first capacitance, a dynamic range gate (DRG) connected between the first node and a second node (FD2 node), a second capacitor connected to the second node and having second capacitance, and a micro controller unit. Other various embodiments identified through the specification are possible.

Abstract: A data storage system for automated driving, includes: a non-volatile memory device; a dedicated memory configured to be managed by an external host as a system memory; an auxiliary power supply configured to provide an auxiliary power; and a storage controller configured to, under control of the external host, store user data in the nonvolatile memory device and store sensor data in the dedicated memory in a ring buffer manner, wherein the storage controller is further configured to, based on a trigger condition being satisfied, flush at least a portion of the sensor data stored in the dedicated memory to the non-volatile memory device by using the auxiliary power.

Abstract: A semiconductor device includes a lower channel pattern and an upper channel pattern stacked on a substrate in a first direction perpendicular to a top surface of the substrate, lower source/drain patterns on the substrate and at a first side and a second side of the lower channel pattern, upper source/drain patterns stacked on the lower source/drain patterns and at a third side and a fourth side of the upper channel pattern, a first barrier pattern between the lower source/drain patterns and the upper source/drain patterns, and a second barrier pattern between the first barrier pattern and the upper source/drain patterns. The first barrier pattern includes a first material and the second barrier pattern includes a second material, wherein the first material and the second material are different.

Abstract: A processor-implemented method with checkpointing includes: performing an operation for learning of an artificial neural network (ANN) model; and performing a checkpointing to store information about a state of the ANN model, simultaneously with performing the operation for the learning of the ANN model.

Abstract: Disclosed is an amplifier that includes a first-first (1-1) transistor and a first-second (1-2) transistor to which differential input signals are applied to gate terminals, respectively; a second-first (2-1) transistor including: one end connected to the 1-1 transistor, a gate terminal configured to receive an operating signal, and the other end configured to output one of differential output signals; a second-second (2-2) transistor including: one end connected to the 1-2 transistor, a gate terminal configured to receive the operating signal, and the other end configured to output the other one of the differential output signals; and a switch connected to one end of the 1-1 transistor and one end of the 1-2 transistor. The switch is configured to turn on based on the 1-1 transistor, the 1-2 transistor, the 2-1 transistor, and the 2-2 transistor being turned off.

Abstract: A speaker diarization model implementing apparatus includes a voice signal analysis module configured to generate mel-spectrogram data from voice signals of a plurality of speakers detected by a voice recognition device, a motion data analysis module configured to generate ultra-wideband (UWB) signal matrix data from motion sensing signals of the plurality of speakers detected by a motion recognition device, a multimodal learning module configured to extract characteristic values based on the mel-spectrogram data and the UWB signal matrix data, and a speaker diarization module configured to separate the plurality of speakers from each other using the characteristic values.

Abstract: A thermal image sensor includes a substrate; a composite layer including an absorption layer and a sensor array layer provided below the absorption layer, the sensor array layer including a plurality of temperature sensing cells, the composite layer having a pattern formed therein, and the pattern including at least one hole penetrating through the absorption layer; and a support separating the substrate from the composite layer.

Abstract: A vertical memory device includes a substrate, first and second sub-semiconductor patterns, first and second common source contacts, and first and second cell structures. The substrate includes a first region and a second region having a same length as the first region in a first direction, the first region having a first width in a second direction perpendicular to the first direction, and the second region having a second width in the second direction that is less than the first width. The first sub-semiconductor pattern covers the first region, and a portion of the first sub-semiconductor pattern has a first thickness. The second sub-semiconductor pattern covers the second region and has a second thickness that is less than the first thickness. The first and second common source contacts are disposed on edges in the second direction of the first and second patterns, respectively.

Abstract: A semiconductor package includes a package substrate, a semiconductor chip on the package substrate, a transparent substrate on the semiconductor chip, a dam structure between the semiconductor chip and the transparent substrate, a dummy pad on a lower side of the dam structure and to which no wiring is connected, a planarization film extending along an upper surface of the semiconductor chip and a passivation film on the planarization film, wherein the planarization film is spaced apart from the dam structure.

Abstract: Provided are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a lower electrode on a substrate, a metal oxide on the lower electrode, a buffer on the metal oxide, an oxide channel in the buffer, a gate insulating layer in the oxide channel, a gate electrode in the gate insulating layer, and an upper electrode on the gate electrode, and the buffer may include a silicide material.

Abstract: A three-dimensional semiconductor integrated circuit device including an inter-die interface is provided. The device includes a top die including a plurality of micro cells provided on a top surface of the top die, a plurality of micro bumps provided on a bottom surface of the top die, and wiring patterns connecting the plurality of micro cells to the plurality of micro bumps; and a bottom die including a plurality of macro cells provided on a top surface thereof, wherein the plurality of macro cells are electrically connected to the plurality of micro bumps, respectively, wherein a size of a region in which the plurality of micro cells are provided is smaller than a size of a region in which the plurality of micro bumps are provided.

Abstract: A semiconductor chip includes a write clock buffer, a voltage regulator, a process calibration circuit and a temperature calibration circuit. The voltage regulator generates plural regulated voltages. The process calibration circuit output one of the regulated voltages as a bias voltage of the write clock buffer, depending on a process variation of the semiconductor chip. The temperature calibration circuit track a temperature variation of the semiconductor chip in real time, performs analog calibration on the bias voltage from the process calibration circuit in real time depending on a result of the tracking, and outputs the analog-calibrated bias voltage to the write clock buffer.

Abstract: A generalized low-density parity-check (G-LDPC) encoder, including a plurality of generalized constraint (GC) encoders configured to perform a plurality of GC encoding operations in parallel based on a GC code having a quasi-cyclic (QC) structure including information variable nodes, inner parity variable nodes, and super check nodes configured to perform multiple condition checks, wherein each GC encoder of the plurality of GC encoders includes a plurality of first logic circuits configured to perform a GC encoding operation of the plurality of GC encoding operations; and an LDPC encoder configured to perform an LDPC encoding operation based on an LDPC code having the QC structure, wherein the LDPC encoder includes a plurality of single check nodes configured to perform a single parity check, wherein the each GC encoder is configured to receive information bits, and to determine parity bits of a portion of inner parity bits corresponding to the information bits by enabling only a portion of the plurality of

Abstract: A semiconductor device includes a substrate, a first sheet pattern on the substrate, a gate electrode on the substrate and surrounding the first sheet pattern, a first source/drain pattern and a second source/drain pattern respectively connected to a first end and a second end of the first sheet pattern, a contact blocking pattern on a lower side of the second source/drain pattern, a first source/drain contact extending in a first direction and connected to the first source/drain pattern, and a second source/drain contact connected to the second source/drain pattern and extending in the first direction to contact an upper surface of the contact blocking pattern. A depth from an upper surface of the gate electrode to a lowermost portion of the first source/drain contact may be greater than a depth from the upper surface of the gate electrode to the upper surface of the contact blocking pattern.

Abstract: A refrigerator is disclosed. The refrigerator includes a temperature sensor, a cooling device, and a processor which controls the cooling device such that, when a user command to change the temperature of a storage compartment set to a first temperature to a second temperatures, is input, the temperature of the storage compartment is changed to the second temperature, based on the temperature of the storage compartment sensed by the temperature sensor, and controls the cooling device such that, when a certain period of time elapses after a point in time when the user command is input, the temperature of the storage compartment returns to the first temperature, based on the temperature of the storage compartment sensed by the temperature sensor.

Abstract: An extreme ultraviolet light source device includes a chamber having a lower surface on which a condensing mirror is arranged, an intermediate focus, and a side surface between the lower surface and an upper surface a first exhaust port and a second exhaust port on the upper surface and spaced apart from the intermediate focus; a droplet supply adjacent to the side surface of the chamber, and configured to supply a droplet to generate the extreme ultraviolet light into the chamber; a light source configured to generate the extreme ultraviolet light by oscillating a laser; a catch adjacent to the side surface of the chamber, opposite to the droplet supply, and configured to receive the droplet discharged from the droplet supply unit; a first exhaust connected to the first exhaust port; and a second exhaust adjacent to the upper surface of the chamber, and connected to the second exhaust port.

Abstract: An apparatus including a receiver and a processor configured to generate a modulus switch ciphertext by performing modulus switching with respect to data received by the receiver, the modulus switching including mapping a component of an input ciphertext generated from the received data to an odd number, generate a blind rotated ciphertext by performing a blind rotation operation based on the modulus switched ciphertext, and generate encrypted data, as a homomorphic encryption operation result, by performing key switching based on the blind rotated ciphertext.

Abstract: A shoe care apparatus includes: a chamber configured to accommodate a shoe; a fan configured to supply air to the chamber; a heat pump device comprising a condenser configured to heat the air and a compressor configured to discharge a refrigerant to the condenser; at least one holder in the chamber and comprising a nozzle configured to spray the air; at least one damper on a side of the chamber, the at least one damper corresponding to the at least one holder so as to adjust supply of the sprayed air; at least one detection sensor in the chamber, the at least one detection sensor being configured to detect the shoe accommodated in the chamber; and a controller configured to control the at least one damper based on a detection signal received from the at least one detection sensor.

Abstract: A phase-locked loop device and its operating method are provided. The phase-locked loop device includes a voltage controlled oscillator configured to generate an output clock signal, a divider configured to divide the output clock signal into first and second phase division signals having a constant phase difference, a sampling phase frequency detector configured to sample a sampling voltage based on the first phase division signal and output any one of the sampling voltage, a first supply voltage, and a second supply voltage based on the second phase division signal, a transconductance circuit configured to output a conversion current based on a hold voltage, and a loop filter configured to generate a voltage control signal based on the conversion current and output the voltage control signal to the voltage controlled oscillator.