Patents Assigned to Samsung Electronics Co., Ld.
  • Patent number: 11798947
    Abstract: A semiconductor device includes an active pattern including a channel region. The channel region is disposed between first and second source/drain patterns that are spaced apart from each other in a first direction. The channel region is configured to connect the first and second source/drain patterns to each other. A gate electrode is disposed on a bottom surface of the active pattern and is disposed between the first and second source/drain patterns. An upper interconnection line is disposed on a top surface of the active pattern opposite to the bottom surface of the active pattern and is connected to the first source/drain pattern.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: October 24, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LD.
    Inventors: Sungmin Kim, Daewon Ha
  • Patent number: 10235761
    Abstract: An object in a first image is segmented by obtaining the first image including the object; receiving a first input signal including first information about a first position in the first image; selecting at least one pixel included in the first image, based on the first information about the first position; generating a second image by dividing the first image into several areas, using the selected at least one pixel; and segmenting the object in the first image by using the first image and the second image.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: March 19, 2019
    Assignee: Samsung Electronics Co., Ld.
    Inventors: Arin Jumpasut, Seong-oh Lee, Moon-sik Jeong, Sung-do Choi
  • Patent number: 8836020
    Abstract: A memory device includes a substrate having a cell array region defined therein. A dummy structure is disposed on or in the substrate near a boundary of the cell array region. The memory device also includes a vertical channel region disposed on the substrate in the cell array region. The memory device further includes a plurality of vertically stacked conductive gate lines with insulating layers interposed therebetween, the conductive gate lines and interposed insulating layers disposed laterally adjacent the vertical channel region and extending across the dummy structure, at least an uppermost one of the conductive gate lines and insulating layers having a surface variation at the crossing of the dummy structure configured to serve as a reference feature. The dummy structure may include a trench, and the surface variation may include an indentation overlying the trench.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: September 16, 2014
    Assignee: Samsung Electronics Co., Ld.
    Inventors: Ju-young Lim, Woon-kyung Lee, Jae-joo Shim, Hui-chang Moon, Sung-min Hwang
  • Publication number: 20080010062
    Abstract: An adaptive encoding method includes splitting an input signal into a low-frequency band signal and a high-frequency band signal; performing forward adaptive linear prediction on the low-frequency band signal and thus filtering the low-frequency band signal; selectively performing backward adaptive linear prediction or long-term prediction on the filtered low-frequency band signal according to the analysis result of the low-frequency band signal; transforming the low-frequency band signal, on which backward adaptive linear prediction or long-term prediction has been performed, into a signal in a frequency domain and quantizing the signal; and encoding the high-frequency band signal using the low-frequency band signal, on which backward adaptive linear prediction or long-term prediction has been performed, or the quantized signal. Therefore, compression efficiency of both speech and music signals can be enhanced, and a robust compression method can be provided for various audio contents at a low bit rate.
    Type: Application
    Filed: July 9, 2007
    Publication date: January 10, 2008
    Applicant: Samsung Electronics Co., Ld.
    Inventors: Chang-yong Son, Eun-mi Oh, Ki-hyun Choo, Jung-hoe Kim