Patents Assigned to Samsung Electronics Co., Ltd.
  • Publication number: 20220149821
    Abstract: A semiconductor circuit may include a first flip-flop configured to output a first input data as a first output signal in response to an inverted input clock signal, a second flip-flop configured to output a second input data as a second output signal in response to an input clock signal, a glitch-free circuit configured to receive the inverted input clock signal, the input clock signal, the first output signal, and the second output signal, and to determine a voltage level of a node on the basis of the inverted input clock signal, the input clock signal, the first output signal, and the second output signal, and an inverter configured to output an output clock signal obtained by inverting the voltage level of the node determined by the glitch-free circuit. The glitch-free circuit does not include a transistor having a gate connected to the node.
    Type: Application
    Filed: July 26, 2021
    Publication date: May 12, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyun Chul HWANG, Min Su KIM
  • Publication number: 20220147870
    Abstract: An electronic device according to an embodiment of the disclosure includes: a communicator; a memory storing one or more instructions; at least one processor configured to execute the one or more instructions stored in the memory to collect content metadata and user metadata from a plurality of different servers that provide content, obtain a content latent factor including information about similarities between pieces of the content based on characteristics of the content metadata, by using a first learning network model, obtain a user latent factor related to user preferred content information based on characteristics of the user metadata, by using a second learning network model, obtain a user preference score for the content based on the content latent factor and the user latent factor, by using a third learning network model, and provide a recommended content list based on the user preference score.
    Type: Application
    Filed: January 6, 2020
    Publication date: May 12, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Vivek AGARWAL, Jatin GARG, Jayoon KOO, Dongjin SEO, Kwanki AHN, Keuntek LEE
  • Publication number: 20220147805
    Abstract: Disclosed is an apparatus and method mapping a natural neural network into an electronic neural network device of an electronic device. The method includes constructing a neural network map of a natural neural network based on membrane potentials of a plurality of biological neurons of the natural neural network, where the membrane potentials correspond to at least two different respective forms of membrane potentials, and mapping the neural network map to the electronic neural network device. The constructing of the neural network map and the mapping of the neural network map implement learning of the electronic neural network device. The method may further includes obtaining an input or stimuli, activating the learned electronic neural network device, provided the obtained input or stimuli, to perform neural network operations, and generating a neural network result for the obtained input or stimuli based on a result of the activated learned electronic neural device.
    Type: Application
    Filed: November 11, 2021
    Publication date: May 12, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Donhee HAM, Sang Joon KIM
  • Publication number: 20220147799
    Abstract: Disclosed is a neural computer including an image sensor capable of controlling a photocurrent. The neural computer according to an embodiment includes a preprocessor configured to receive an image and generate a feature map for the received image; a flattening unit configured to transform the feature map generated by the preprocessor into tabular data to provide data output; and an image classifier configured to classify images received through the preprocessor by using the data output by the flattening unit as an input value. The preprocessor includes an optical signal processor configured to receive the image and generate the feature map.
    Type: Application
    Filed: October 13, 2021
    Publication date: May 12, 2022
    Applicants: Samsung Electronics Co., Ltd., President and Fellows Of Harvard College
    Inventors: Changhyun KIM, Houk JANG, Henry Julian HINTON, Hyeonjin SHIN, Minhyun LEE, Donhee HAM
  • Publication number: 20220146571
    Abstract: A test apparatus includes a first module configured to structurally support a target semiconductor device, and a second module reversibly attachable to the first module. The first module includes a first housing including one or more inner surfaces at least partially defining an inner space, a volume control unit configured to control a volume of the inner space, a mounting unit at least partially exposed to the inner space and configured to be exposed to the target semiconductor device, and a magnetic force control unit in the first housing. The second module includes a second housing, a test board in the second housing, and an attachable/detachable member in the second housing. The test board may be electrically connected to the target semiconductor device. The magnetic force control unit may control a magnetic property of the attachable/detachable member to cause the attachable/detachable member to attach/detach to/from the magnetic force control unit.
    Type: Application
    Filed: November 2, 2021
    Publication date: May 12, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Hyung Il KIM, Se-Hyun SEO, Byeong Min YU, Jae Hong KIM, Sang Jae RHEE, Young Chyel LEE
  • Publication number: 20220147806
    Abstract: An electronic device and a method for controlling are provided. The electronic device may include a memory storing first input data and first weight data used in operations of a neural network model and a processor configured to input the first input data and the first weight data into a first module, and acquire second input data and second weight data, where a part of the first input data is truncated, and where a part of the first weight data is truncated, input the second input data and the second weight data into a second module that performs multiplication operations, and acquire first output data, and based on scaling factors of the first input data and first weight data identified through the first module, convert the acquired first output data into a floating point form expressing a first bit as a unit scale and acquire second output data.
    Type: Application
    Filed: November 16, 2021
    Publication date: May 12, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeongin YUN, Sungpill CHOI, Jonghun LEE
  • Publication number: 20220150785
    Abstract: An apparatus distributing communication load over a plurality of communication cells may select action centers from random cell reselection values, based on a standard deviation of an internet protocol (IP) throughout over the plurality of communication cells; input a first vector indicating a communication state of a communication system and a second vector indicating the standard deviation of the IP throughout of the plurality of communication cells, to a neural network to output a sum of the action centers and offsets as cell reselection parameters; and transmit the cell reselection parameters to the communication system to enable a base station of the communication system to perform a cell reselection based on the cell reselection parameters.
    Type: Application
    Filed: May 28, 2021
    Publication date: May 12, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Di WU, Jikun KANG, Yi Tian XU, Jimmy LI, Michael JENKIN, Xue LIU, Xi CHEN, Gregory Lewis DUDEK, Intaik PARK, Taeseop LEE
  • Publication number: 20220150306
    Abstract: Methods and systems for identifying devices in an Internet of Things (IoT) environment are provided. A method includes detecting at least one action initiated by a user using a user device; generating at least one device type watermark for each of one or more second devices capable of performing the at least one action; transmitting, to an IoT cloud server, a request including at least one time slot for each of the one or more second devices, the request requesting each of the one or more second devices to indicate the at least one device type watermark in the at least one time slot; and identifying at least one second device to perform the at least one action, among the one or more second devices, based on detecting the at least one device type watermark indicated by the at least one second device.
    Type: Application
    Filed: May 18, 2021
    Publication date: May 12, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Prateek KUMAR, Mugula SATYA SHANKAR KAMESHWAR SHARMA, Pavithra VANCHEESWARAN
  • Publication number: 20220150786
    Abstract: Hybrid use of dual policies is provided to improve a communication system. In a multiple access scenario, when an inactive user equipment (UE) transitions to an active state, it may be become a burden to a radio cell on which it was previously camping. In some embodiments, hybrid load balancing is provided using a hierarchical machine learning paradigm based on reinforcement learning in which an LSTM generates a goal for one policy influencing cell reselection so that another policy influencing handover over active UEs can be assisted. The communication system as influenced by the policies is modeled as a Markov decision process (MDP). The policies controlling the active UEs and inactive UEs are coupled, and measureable system characteristics are improved. In some embodiments, policy actions depend at least in part on energy saving.
    Type: Application
    Filed: June 30, 2021
    Publication date: May 12, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jikun KANG, Xi CHEN, Di WU, Yi Tian XU, Xue LIU, Gregory Lewis DUDEK, Taeseop LEE, Intaik PARK
  • Publication number: 20220144542
    Abstract: An apparatus for storage of a carrying material, includes: a body frame; a plurality of loading members installed on the body frame and disposed such that a carrying material forms a plurality of layers in upper and lower directions; a driving unit connected to at least one of the plurality of loading members; and an auxiliary coupling unit provided in a portion of the plurality of loading members for attachment and detachment to and from a neighboring loading member, wherein the plurality of loading members are provided with a plurality of first loading members fixedly installed at a lower end portion of the body frame, and a plurality of second loading members disposed above the first loading member and movably installed on the body frame, wherein the driving unit is connected to at least one of the plurality of second loading members, wherein the auxiliary coupling unit includes an electromagnet installed at one end of the second loading members, and a magnetic body installed at the other end of the second
    Type: Application
    Filed: November 3, 2021
    Publication date: May 12, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Gyeongdam BAEK, Minsoo PARK, Seungjun LEE, Mingu CHANG, Byungkook YOO, Hujong LEE, Jimin CHOI
  • Publication number: 20220148631
    Abstract: Provided are an apparatus, a memory device, and a method for storing a plurality of parameter codes for an operation parameter. The memory device includes a mode register and a control logic circuit. To set a first operating condition and a second operating condition for one operation parameter, the mode register stores a first parameter code for the operation parameter and a second parameter code, which is expressed as an offset value from the first parameter code. The control logic circuit sets the first operating condition as a current operating condition of the memory device by using the first parameter code based on a first control code and sets the second operating condition as the current operating condition of the memory device by using the first parameter code and the second parameter code based on a second control code.
    Type: Application
    Filed: September 3, 2021
    Publication date: May 12, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youngbin LEE, Kiho KIM, Jinhoon JANG, Yeonkyu CHOI
  • Publication number: 20220149166
    Abstract: A field-effect transistor includes a gate structure comprising a structure in which a first insulating layer, a first gate electrode, and a second insulating layer are sequentially stacked on a first conductive layer, the gate structure surrounding a first hole through the first insulating layer and exposing a part of the first conductive layer; a second conductive layer on the second insulating layer and surrounding a second hole connected to the first hole and exposing a part of the first conductive layer; a first gate insulating layer covering an inner wall of the gate structure exposed by the first hole; a semiconductor layer covering a part of the first conductive layer exposed through the first hole and the second hole, the first gate insulating layer, and the second conductive layer; a second gate insulating layer covering the semiconductor layer; and a second gate electrode filling the first and second holes.
    Type: Application
    Filed: August 11, 2021
    Publication date: May 12, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kwanghee LEE, Sangwook KIM
  • Publication number: 20220149040
    Abstract: An integrated circuit device includes a fin-type active region protruding from a substrate and extending in a first direction, a plurality of semiconductor patterns disposed apart from an upper surface of the fin-type active region, the plurality of semiconductor patterns each including a channel region; a gate electrode surrounding the plurality of semiconductor patterns, extending in a second direction perpendicular to the first direction, and including a main gate electrode, which is disposed on an uppermost semiconductor pattern of the plurality of semiconductor patterns and extends in the second direction, and a sub-gate electrode disposed between the plurality of semiconductor patterns; a spacer structure disposed on both sidewalls of the main gate electrode; and a source/drain region connected to the plurality of semiconductor patterns, disposed at both sides of the gate electrode, and contacting a bottom surface of the spacer structure.
    Type: Application
    Filed: January 26, 2022
    Publication date: May 12, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seungryul LEE, Yongseung KIM, Jungtaek KIM, Pankwi PARK, Dongchan SUH, Moonseung YANG, Seojin JEONG, Minhee CHOI, Ryong HA
  • Publication number: 20220143543
    Abstract: An apparatus for collecting a by-product, includes: a chamber provided with a gas inlet and a gas outlet and having an internal space; a heater disposed on the gas inlet side of the internal space within the chamber and varying a heating temperature in time series; a vortex forming member disposed around the heater; a plurality of first collecting members disposed below the heater; a second collecting member disposed below the first collecting member so that a plurality of second collecting members intersect each other; and a third collecting member disposed on the gas outlet side of the internal space within the chamber.
    Type: Application
    Filed: July 20, 2021
    Publication date: May 12, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seoyoung Maeng, Iljun Jeon, Suji Gim, Youngseok Roh, Jongyong Bae, Jungjoon Pyeon
  • Publication number: 20220149048
    Abstract: A semiconductor device includes an active pattern on a substrate, a gate structure buried at an upper portion of the active pattern, a bit line structure on the active pattern, a lower spacer structure covering a lower sidewall of the bit line structure, a contact plug structure on the active pattern and adjacent to the bit line structure, and a capacitor on the contact plug structure. The lower spacer structure includes first and second lower spacers that are sequentially stacked from the lower sidewall of the bit line structure in a horizontal direction that is substantially parallel to an upper surface of the substrate, the first lower spacer includes an oxide, and contacts the lower sidewall of the bit line structure, but does not contact the contact plug structure, and the second lower spacer includes a material different from any of the materials of the first lower spacer.
    Type: Application
    Filed: June 24, 2021
    Publication date: May 12, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Joonkyu RHEE, Jiyoung AHN, Hyunyong KIM, Jamin KOO, Yongseok AHN, Minsub UM, Sangho LEE, Yoonyoung CHOI
  • Publication number: 20220149501
    Abstract: A qubit memory of a quantum computer is provided. The qubit memory according to an embodiment includes a first readout unit, a first transmon, and a first data storage unit storing quantum information, and the first data storage unit includes a first superconducting waveguide layer, an insulating layer, and a superconductor layer sequentially stacked on a substrate. In one example, the first superconducting waveguide layer may include a superconducting resonator.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 12, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jaehyeong LEE, Hyeokshin KWON, Jaeho SHIN, Taehwan JANG, Insu JEON
  • Publication number: 20220149112
    Abstract: A display module and a display apparatus including the same are provided. The display module includes a first substrate; a plurality of micro-pixel controllers provided on an upper surface of the first substrate and including a second substrate; a plurality of pixels including a plurality of inorganic light emitting diodes (LEDs) provided on an upper surface of the second substrate; and a driver integrated chip (IC) configured to transmit a driving signal to the plurality of micro-pixel controllers, wherein each pixel of the plurality of pixels includes at least two inorganic LEDs among the plurality of inorganic LEDs, and wherein each micro-pixel controller of the plurality of micro-pixel controllers is electrically connected to inorganic LEDs of at least two pixels.
    Type: Application
    Filed: November 11, 2021
    Publication date: May 12, 2022
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Daesuck HWANG, Kyungwoon JANG, Changkyu CHUNG, Gyun HEO, Soonmin HONG
  • Publication number: 20220150453
    Abstract: An apparatus for acquiring images includes an image sensor and a signal processor. The image sensor may include a sensor substrate and a color separation lens array, wherein the sensor substrate includes a plurality of photo-sensing cells, and the color separation lens array may separate an incident light into a plurality of lights having different wavelengths and forms a phase distribution for condensing the plurality of lights having the different wavelengths on adjacent photo-sensing cells of the plurality of photo-sensing cells. The signal processor may perform deconvolution on sensing signals of the plurality of photo-sensing cells to obtain a sub-sampled image, perform demosaicing to restore a full resolution image having a full resolution from the sub-sampled image, and correct a color of the full resolution image using a point spread function (PSF) of the color separation lens array.
    Type: Application
    Filed: November 3, 2021
    Publication date: May 12, 2022
    Applicants: SAMSUNG ELECTRONICS CO., LTD., INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Sangyun LEE, Moongi KANG, Seokho YUN, Jonghyun KIM, Kyeonghoon JEONG
  • Publication number: 20220149114
    Abstract: Provided are a chalcogen compound having ovonic threshold switching characteristics, and a switching device, a semiconductor device, and/or a semiconductor apparatus which include the chalcogen compound. The chalcogen compound includes five or more elements and may have stable switching characteristics with a low off-current value (leakage current value). The chalcogen compound includes: selenium (Se) and tellurium (Te); a first element comprising at least one of indium (In), aluminum (Al), strontium (Sr), and calcium (Ca); and a second element including germanium (Ge) and/or tin (Sn), and may further include at least one of arsenic (As), antimony (Sb), and bismuth (Bi).
    Type: Application
    Filed: June 29, 2021
    Publication date: May 12, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kiyeon YANG, Bonwon KOO, Segab KWON, Chungman KIM, Yongyoung PARK, Dongho AHN, Seunggeun YU, Changseung LEE
  • Publication number: 20220149043
    Abstract: A semiconductor device may include a substrate including an active pattern extending in a first direction, a gate electrode running across the active pattern and extending in a second direction intersecting the first direction, a source/drain pattern on the active pattern and adjacent to a side of the gate electrode, an active contact in a contact hole exposing the source/drain pattern, an insulating pattern filling a remaining space of the contact hole in which the active contact is provided, a first via on the active contact, and a second via on the gate electrode. The active contact may include a first segment that fills a lower portion of the contact hole and a second segment that vertically protrudes from the first segment. The first via is connected to the second segment. The insulating pattern is adjacent in the first direction to the second via.
    Type: Application
    Filed: January 24, 2022
    Publication date: May 12, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Heonjong SHIN, Sunghun JUNG, Minchan GWAK, Yongsik JEONG, Sangwon JEE, Sora YOU, Doohyun LEE