Abstract: A method for handling voice input by voice assistant device are provided. The method includes receiving, by the voice assistant device, a voice input from a user; identifying, by the voice assistant device, at least one first user intent and a plurality of slots based on the voice input, wherein the plurality of slots may include at least one slot related to the at least one first user intent and at least one slot unrelated to the at least one first user intent; identifying, by the voice assistant device, at least one second user intent based on the voice input and the at least one slot unrelated to the at least one first user intent; and performing, by the voice assistant device, at least one first operation based on the at least one first user intent and at least one second operation based on the at least one second user intent.

Abstract: A semiconductor package comprises a core layer, an integrated stack capacitor (ISC) on the core layer, one or more build-up layers on the core layer in which the ISC is embedded, and one or more metal layers on the core layer.

Abstract: A showerhead includes a showerhead body positioned at an upper surface of a reaction chamber and configured to inject a reaction gas toward a substrate in the reaction chamber and at least one groove in a lower surface of the showerhead body, where the showerhead body is oriented toward the substrate and the lower surface of the showerhead body includes a slanted structure.

Abstract: Provided is a water treatment apparatus, including a first channel including a first current collector and an anion exchange membrane, a second channel including a second current collector and a cation exchange membrane, a third channel including the anion exchange membrane and the cation exchange membrane, and at least one processor configured to during a deionization operation, apply a negative voltage to the second current collector to move cations contained in water in the third channel to the second channel, during a regeneration operation, apply a first positive voltage to the second current collector to move cations in the second channel to the third channel, and during a descaling operation, apply a second positive voltage greater than the first positive voltage to the second current collector to electrolyze water in the second channel.

Abstract: Provided is an electronic device including a lens assembly that includes a plurality of lenses aligned along an optical axis from an object side of the lens assembly to an image side of the lens assembly, the plurality of lenses including a first lens having positive refractive power, a second lens, a third lens, a fourth lens having negative refractive power and an image side of the fourth lens being concave, a fifth lens, and a sixth lens having positive refractive power, and an image sensor comprising an imaging plane on which an image is formed, and wherein an air gap between the fourth lens and the fifth lens is larger than an air gap between other two adjacent lenses.

Abstract: A light source apparatus includes an optical member, a substrate on a rear side of the optical member, a light source mounted on the substrate and configured to emit light, and a supporter between the optical member and the substrate and including a support body at one end of the supporter facing the substrate and mounted on the substrate, and an adsorption portion at another end of the supporter facing the optical member and configured to form an adsorption space having a pressure less than the pressure outside the supporter in a state in which the supporter supports the optical member.

Abstract: A method of decoding a motion vector includes: determining at least one prediction motion vector (PMV) candidate block used to determine a PMV of a current block; determining an availability of a motion vector of the at least one PMV candidate block; when there is a PMV candidate block determined to be unavailable, determining the PMV of the current block by using a default motion vector (MV); and obtaining a motion vector of the current block based on the determined PMV.

Abstract: An image sensor may include pixel groups arranged in a Bayer pattern and a color separating lens array that separates incident light by wavelengths and concentrates the separated incident light on the pixels. The color separating lens array may include pixel corresponding groups, with each group having regions containing nanoposts in two layers. In each of the pixel corresponding groups in each of the two layers, there are a central group and a plurality of peripheral groups. The displacements of arrangement centers of the nanoposts in at least two of the peripheral groups have variations.

Abstract: A water treatment apparatus includes a first ion removal module including a first cation exchange membrane, a first anion exchange membrane, and a first deionization channel therebetween; a second ion removal module including a second cation exchange membrane, a second anion exchange membrane, and a second deionization channel therebetween; and a fluid separation device to separate a fluid, discharged from the first deionization channel, and to guide the fluid. The fluid separation device includes an outer guide to guide a portion of the fluid discharged from the first deionization channel to an outside of the second deionization channel, and a center guide to guide another portion of the fluid from the first deionization channel to the second deionization channel, and the center guide arranged inside of the outer guide.

Abstract: A method performed by a mura compensation data generation device, the method includes: generating optical information for a plurality of pixels of a display panel operating based on test data; generating, based on the optical information, raw mura compensation data to compensate input video data provided to the display panel; extracting a high spatial frequency component and a low spatial frequency component from the raw mura compensation data; generating a compressed high spatial frequency component, by compressing, based on a first compression algorithm, the high spatial frequency component; generating a compressed low spatial frequency component, by compressing, based on a second compression algorithm, the low spatial frequency component; and storing the compressed high spatial frequency component and the compressed low spatial frequency component in an external storage circuit.

Abstract: A processor-implemented method with super resolution includes: determining a direction type of an input image based on a gradient of the input image; acquiring a first intermediate image that is a super-resolution image corresponding to the input image based on a residual look-up table (LUT) corresponding to a kernel set mapped to the determined direction type; determining a LUT strength map of the input image based on the gradient of the input image and a preset tuning parameter; and generating an output image that is a super-resolution image of the input image based on the LUT strength map and the first intermediate image.

Abstract: An image sensor according to an embodiment includes a substrate having first and second surfaces facing each other, separated by a deep trench, and including a plurality of pixel regions; a plurality of photoelectric conversion regions disposed in the plurality of pixel regions; a blocking region disposed in the plurality of pixel regions; and a plurality of color filters and a plurality of micro lenses disposed on the second surface of the substrate. The blocking region is disposed adjacent to the second surface of the substrate, the blocking region includes a first element of a first type, and the plurality of photoelectric conversion regions include a second element of a second type different from the first type. The concentration of the first element on the second surface of the substrate in the blocking region is about 1E16/cm3 to about 1E18/cm3.

Abstract: A processor-implemented method includes: determining a first length of a captured object included in an image frame captured by a single camera; determining a second length of a real object corresponding to the captured object; and estimating a target distance between an apparatus and the real object based on a ratio between the first length and the second length.

Abstract: A battery may include: a negative electrodes including a negative electrode including a first tab portion, and a negative electrode current collector including a first recess; positive electrodes arranged alternately with the negative electrodes, and including a positive electrode including a second tab portion, and a positive electrode current collector including a second recess; a separator between two adjacent electrodes among the negative electrodes and the positive electrodes; a first lead tab in the first recess; and a second lead tab in the second recess, wherein the first tab portion is welded to the first lead tab so as to form a first welding portion located in the first recess, and the second tab portion is welded to the second lead tab so as to form a second welding portion located in the second recess.

Abstract: A convolutional neural network (CNN)-based analog in-sensor computing device may include a convolution layer including one or more convolution blocks configured to be used a predetermined number of times or more and perform a convolution operation, and an memory configured to temporarily store an output of the convolution layer and provide the stored analog output to a subsequent convolution layer.

Abstract: Provided is a semiconductor package including a redistribution substrate, a first semiconductor chip on the redistribution substrate, a second semiconductor chip on the redistribution substrate and spaced apart from the first semiconductor chip in a horizontal direction, a third semiconductor chip on the second semiconductor chip, and a heat dissipation chip on the first semiconductor chip and spaced apart from the third semiconductor chip in the horizontal direction, wherein the second semiconductor chip includes a plurality of through vias passing through at least a portion of the second semiconductor chip in a vertical direction, and wherein a metal pad and an adhesive layer are between the first semiconductor chip and the heat dissipation chip.

Abstract: A processor-implemented neural network method includes: determining a reference sample among sequential input samples to be processed by a neural network, the neural network comprising an input layer, one or more hidden layers, and an output layer; performing an inference process of obtaining an output activation of the output layer based on operations in the hidden layers corresponding to the reference sample input to the input layer; determining layer contraction parameters for determining an affine transformation relationship between the input layer and the output layer, for approximation of the inference process; and performing inference on one or more other sequential input samples among the sequential input samples using affine transformation based on the layer contraction parameters determined with respect to the reference sample.

Abstract: A semiconductor device includes a plurality of active patterns respectively extending on a substrate in a first direction, a separation pattern extending on the substrate in a second direction, and dividing each of the plurality of active patterns into first and second active patterns, the separation pattern including a first separation pattern and a second separation pattern, the second separation pattern being shifted from the first separation pattern in the first direction to partially overlap the first separation pattern in the second direction, first and second dummy gate structures on first and second sides of the separation pattern, respectively, and extending along corresponding end portions of the first and second active patterns in the second direction, respectively, and a plurality of first and second gate structures crossing portions of the first and second active patterns, respectively, and extending in the second direction.

Abstract: Provided are a ferroelectric semiconductor device and a method of extracting a defect density of the same. A ferroelectric electronic device includes a first layer, an insulating layer including a ferroelectric layer and a first interface that is adjacent to the first layer, and an upper electrode over the insulating layer, wherein the insulating layer has a bulk defect density of 1016 cm?3 eV?1 or more and an interface defect density of 1010 cm?2 eV?1 or more.

Abstract: A semiconductor device is provided. The semiconductor device includes a first bit line crossing a memory cell array region in a first direction and extending into an extension region adjacent to the memory cell array region, a second bit line crossing the memory cell array region in the first direction and extending into the extension region, and adjacent to the first bit line, an insulating pattern within the extension region and contacting an end portion of the second bit line in the first direction, and an insulating spacer within the extension region and contacting an end portion of the first bit line in the first direction, the insulating spacer being different from the insulating pattern.