Patents Assigned to Samsung Electronics Col,. Ltd.
  • Publication number: 20120133995
    Abstract: A document scanning apparatus for scanning a document is provided. The document scanning apparatus includes an image sensor unit which irradiates an incident light towards the document and generates image data by sensing a reflected light reflected from the document, a supporting unit which supports the image sensor unit, a movement unit which moves the image sensor unit between a scanning position and a calibration position, a housing which houses the image sensor unit, the supporting unit, and the movement unit, a transparent plate which transmits the incident light and the reflected light, a calibration sheet which is attached to a surface of the transparent plate, which is exposed to outside and is positioned in an area including the calibration position, and a housing cover which is coupled to the housing and seals inside of the housing.
    Type: Application
    Filed: August 26, 2011
    Publication date: May 31, 2012
    Applicant: SAMSUNG ELECTRONICS COL., LTD.
    Inventors: Jee-hoon Chun, Gyu-sok Jun
  • Patent number: 7339185
    Abstract: A phase change memory device includes a mold layer disposed on a substrate, a heating electrode, a filling insulation pattern and a phase change material pattern. The heating electrode is disposed in an opening exposing the substrate through the mold layer. The heating electrode is formed in a substantially cylindrical shape, having its sidewalls conformally disposed on the lower inner walls of the opening. The filling insulation pattern fills an empty region surrounded by the sidewalls of the heating electrode. The phase change material pattern is disposed on the mold layer and downwardly extended to fill the empty part of the opening. The phase change material pattern contacts the top surfaces of the sidewalls of the heating electrode.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: March 4, 2008
    Assignee: Samsung Electronics Col Ltd.
    Inventors: Yoon-Jong Song, Se-Ho Lee, Ki-Nam Kim, Su-Youn Lee, Jae-Hyun Park
  • Patent number: 7250346
    Abstract: In the method of manufacturing a dual gate oxide layer of a semiconductor device, which has first and second active regions operating at mutually different voltages on a semiconductor substrate, the first and second active regions having a device isolation layer of STI (Shallow Trench Isolation) structure; the method of manufacturing the dual gate insulation layer includes, forming the device isolation layer so that an uppermost part thereof is positioned lower than an upper surface of the first and second active regions, before forming a gate insulation layer corresponding to each of the first and second active regions. Whereby, it is be effective till a portion of trench sidewall utilized as the active region, to increase a cell current of the active region and to prevent a stringer caused by a stepped coverage between the active region and a field region and a dent caused on a boundary face between the active region and the field region.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: July 31, 2007
    Assignee: Samsung Electronics Col., Ltd.
    Inventors: Jong-Sik Chun, Hyun-Ho Jo, Byung-Hong Chung
  • Patent number: 6875690
    Abstract: Provided are a semiconductor device having a self-aligned contact plug and a method of fabricating the semiconductor device. The semiconductor device includes conductive patterns, a first interlayer insulating layer, a first spacer, a second interlayer insulating layer, and a contact plug. In each conductive pattern, a conductive layer and a capping layer are sequentially deposited on an insulating layer over a semiconductor substrate. The first interlayer insulating layer fills spaces between the conductive patterns and has a height such that when the first interlayer insulating layer is placed on the insulating layer, the first interlayer insulating layer is lower than a top surface of the capping layer but higher than a top surface of the conductive layer. The first spacer surrounds the outer surface of the capping layer on the first interlayer insulating layer.
    Type: Grant
    Filed: July 22, 2003
    Date of Patent: April 5, 2005
    Assignee: Samsung Electronics Col,. Ltd.
    Inventors: Myeong-Cheol Kim, Chang-Jin Kang, Kyeong-Koo Chi, Seung-Young Son