Abstract: A contact structure includes a lower conductive pattern disposed on a predetermined region of a semiconductor substrate. The lower conductive layer has a concave region at a predetermined region of a top surface thereof. An embedding conductive layer fills the concave region. The top surface of the embedding conductive layer is placed at least as high as the height of the flat top surface of the lower conductive pattern. A mold layer is disposed to cover the semiconductor substrate, the lower conductive pattern and the embedding conductive layer. An upper conductive pattern is arranged in an intaglio pattern. The intaglio pattern is disposed in the mold layer to expose a predetermined region of the embedding conductive layer.
Type:
Grant
Filed:
April 28, 2004
Date of Patent:
February 20, 2007
Assignee:
Samsung Electronics, Oo., ltd.
Inventors:
Jung-Hwan Oh, Byung-Lyul Park, Hong-Seong Son