Abstract: A conditioner disc may include a disc substrate including a first surface and a second surface opposite the first surface, a first coating film on the first surface of the disc substrate, a second coating film on the first coating film and having a reactive group configured to react with a hydroxyl radical, and protrusions vertically passing through the second coating film and the first coating film. The protrusions may be on the first surface of the disc substrate.

Abstract: An electronic device for providing a virtual image includes at least one processor configured to obtain an input image, and generate a flipped image by performing correction to flip the input image, an optical engine configured to provide light of the flipped image when receiving the flipped image, a waveguide comprising a first optical coupling area allowing the light of the flipped image provided from the optical engine to be incident into the waveguide and a second optical coupling area emitting the light of the flipped image incident through the first optical coupling area to the outside, and a lens configured to provide the virtual image in which the input image is floating on a virtual projection plane by focusing the light of the flipped image emitted through the second optical coupling area into an inverted image on the virtual projection plane.

Abstract: Provided is an electronic device including a fixed frame, a rotating frame rotatable relative to the fixed frame, a motor configured to provide power for rotating the rotating frame, a rotating shaft configured to be rotated by the motor, a first gear detachably coupled to the rotating shaft and rotatable by power from the motor transmitted through the rotating shaft, and a second gear configured to engage with the first gear such that the rotating frame rotates relative to the fixed frame. The rotating frame is rotatable relative to the fixed frame by external force when the first gear and the second gear are separated.

Abstract: A burn-in test method for a memory device is provided. The method includes setting a wordline isolation circuit to a standby mode; setting the wordline isolation circuit to a turn-off state and performing a first burn-in test by outputting a first test voltage from a sub-wordline driver circuit; and changing the wordline isolation circuit to a turn-on state and performing a second burn-in test by outputting a second test voltage lower than the first test voltage from the sub-wordline driver circuit.

Abstract: A processor-implemented method includes storing, in a configuration information cache register, vector configuration information corresponding to each of vector operation instructions within vector loop code of a loop structure, marking the configuration information cache register storing the vector configuration information, using an offset at a starting position within the vector operation instruction corresponding to the vector configuration information to the vector loop code of the loop structure, counting the offset at the starting position within the vector operation instruction within the vector loop code to the vector loop code of the loop structure, and performing, in response to execution of the vector loop code, a vector operation using the vector configuration information in the configuration information cache register marked with the offset, in response to reaching a vector operation instruction in which a count matches the offset.

Abstract: An analog-to-digital converter ADC includes a first successive approximation register analog-to-digital converter (SAR ADC) configured to convert an in-phase input signal to digital data using a first integrator, a second successive approximation register analog-to-digital converter (SAR ADC) configured to convert a quadrature input signal to digital data using a second integrator, and first to fourth sampling capacitors configured to transmit an output of the first integrator to an input terminal of the second integrator, and transmit an output of the second integrator to an input terminal of the first integrator when the first integrator and the second integrator integrate the sampled in-phase input signal and the quadrature input signal, respectively. The first and second SAR ADCs and the first to fourth sampling capacitors are driven according to an operation sequence of a sampling stage, a conversion stage, and an integration stage.

Abstract: A current sense amplifier includes a current sense amplifier core structure including a pair of power field effect transistors (FETs), a start-up circuit including a start-up switch coupled with a FET, and a pulse generation circuit configured to switch on the start-up circuit for a predefined time duration. The FET is grounded and coupled with the pair of power FETs via the start-up switch. The start-up circuit is configured to change a zero-current state of the current sense amplifier core structure to an active state.

Abstract: A cooking apparatus includes: a first plate having one or more cooking zones and an opening formed therein, a second plate inserted into the opening and seated on the first plate, and a display disposed in a position corresponding to a position of the opening so that visual information is displayed on the display and visible through the second plate. The first plate further comprises an inner wall surface which is a boundary surrounding inside of the opening thereby forming the opening. The inner wall surface includes a first inner wall surface formed along the boundary of the opening, and inclined to support the second plate in response to the second plate being seated on the first plate; a, and a second inner wall surface bent and extending from the first inner wall surface.

Abstract: Provided is an operation method of a memory apparatus, including programming a plurality of first memory cells connected to a first word line in strings connected to a first string select line (SSL), obtaining a first pass loop count corresponding to a first program state of the plurality of first memory cells which are programmed, programming a plurality of second memory cells connected to the first word line in a plurality of strings connected to a second SSL into the first program state, obtaining a second pass loop count corresponding to the first program state of the plurality of second memory cells which are programmed into the first program state, and deciding, based on the first pass loop count and the second pass loop count, whether a program of a plurality of memory cells connected to the first word line has failed.

Abstract: A source driver is provided. The source driver includes: a switch circuit with first switches, which are respectively connected between a first charge sharing line and data lines; and a charge sharing controller configured to: receive pieces of first pixel data, which respectively correspond to the data lines, and pieces of second pixel data, which respectively correspond to the of first pixel data; output a charge sharing signal having an active level to a first group of switches among the first switches respectively connected to first data lines from among the lines, based on the pieces of first pixel data and the pieces of second pixel data corresponding to the first data lines being different from each other in at least two upper bits thereof.

Abstract: A memory device includes a data pad and a decision feedback equalizer configured to equalize a data signal received through the data pad. The decision feedback equalizer includes a first input circuit configured to generate a first feedback signal and a second feedback signal based on the data signal and a reference voltage according to a first clock signal, and a first latch circuit configured to generate a first output signal and a second output signal based on the first feedback signal and the second feedback signal. The memory device further includes a first impedance circuit included in the first input circuit and configured to adjust frequency responses of the first feedback signal and the second feedback signal, and/or a second impedance circuit included in the first latch circuit and configured to adjust frequency responses of the first output signal and the second output signal.

Abstract: An apparatus and method of estimating an object posture are provided. A method includes determining key point information in an image to be processed, determining modified key point information based on a key point feature map corresponding to the key point information, and estimating an object posture of an object in the image to be processed, based on the modified key point information.

Abstract: An induction heater includes: a plate on which a cooking vessel is placeable; a vibration sensor configured to detect vibration intensity of the cooking vessel while the cooking vessel is placed on the plate; a heating coil configured to heat the cooking vessel; and a controller configured to: control the heating coil to heat the cooking vessel, obtain a first vibration pattern of the cooking vessel based on vibration data obtained through the vibration sensor, based on the first vibration pattern satisfying a first condition, decrease power level of the heating coil and maintain the decreased power level for a defined time, obtain a second vibration pattern of the cooking vessel after the defined time lapses, and based on the second vibration pattern satisfying a second condition, determine content of the cooking vessel is in a boiling state.

Abstract: A method for performing RLC migration in a wireless network system includes: identifying, based on a scaling situation, a source RLC of a first distributed unit (DU) to which data is to be migrated and a target RLC of a second DU to which data is to be migrated from the source RLC; issuing a command for data forwarding from the source RLC to the target RLC; identifying a downlink reference sequence number for downlink data obtained from a centralized unit (CU) based on a forwarding command time point; delivering the migration information of the source RLC to the target RLC; transmitting downlink data processed from one of the source RLC or the target RLC to a medium access control (MAC) of the second DU based on the downlink reference sequence number; and changing the F1-U interface of the CU to the CU and the target RLC.

Abstract: Provided are a magnetic tunneling junction device having a fast operating speed without reducing or with increasing data retention and/or a memory device including the magnetic tunneling junction device. The magnetic tunneling junction device includes a free layer having a first surface and a second surface opposite the first surface; a pinned layer facing the first surface of the free layer; a first oxide layer between the pinned layer and the free layer; and a second oxide layer on the second surface of the free layer. The free layer includes a first free layer adjacent to the first oxide layer and a second free layer adjacent to the second oxide layer. The first free layer includes a magnetic material not doped with a non-magnetic metal, and the second free layer includes a magnetic material doped with the non-magnetic metal.

Abstract: A semiconductor device includes active patterns on a substrate and spaced apart in a first direction, at least one source/drain pattern on at least a first active pattern of the active patterns, an interlayer insulating layer covering the at least one source/drain pattern, and a separation pattern between the active patterns and extending in a second direction intersecting the first direction, where the interlayer insulating layer includes an embedded portion extending into the first active pattern of the active patterns, the separation pattern includes a first sidewall and a second sidewall opposite to the first sidewall in the first direction and the first sidewall contacts the embedded portion and the second sidewall contacts the at least one source/drain pattern.

Abstract: A semiconductor device includes first source/drain patterns disposed at a first level in a substantially vertical direction on a substrate, a first channel pattern connected to the first source/drain patterns, second source/drain patterns disposed at a second level higher than the first level, a second channel pattern connected to the second source/drain patterns, a gate electrode on the first and second channel patterns, and a contact substantially vertically connected to at least one of the first and second source/drain patterns. The contact may be provided in a bottleneck shape having a smaller diameter at the second level than a diameter at levels other than the second level.

Abstract: An image sensing device and a method of image signal processing are provided. The image sensing device includes a lens module, a microlens below the lens module, an image sensor below the microlens and which includes a first pixel having a cyan color filter, and which outputs a first image signal, a second pixel having a magenta color filter, and which outputs a second image signal, a third pixel having a yellow color filter, and which outputs a third image signal, and a fourth pixel which outputs a fourth image signal, and an image signal processor which receives image signals of the image sensor, and extracts a red (R) data component, green (G) data component, blue (B) data component, and near-infrared (IR) data component of the light from the image signals.

Abstract: A display device includes: a plurality of light emitting elements on a circuit board and spaced apart from each other, the plurality of light emitting elements configured to emit light forward, respectively; a reflective layer on a transparent substrate facing the circuit board, the reflective layer including openings at positions corresponding to the plurality of light emitting elements such that light emitted from the plurality of light emitting elements respectively passes through corresponding openings and is emitted forward, the reflective layer being configured to reflect light from the front; and a light blocking layer between the circuit board and the transparent substrate and configured to absorb a portion of light emitted from the plurality of light emitting elements so as to prevent light emitted from the plurality of light emitting elements from reaching openings adjacent to the corresponding openings respectively.

Abstract: A method of manufacturing a semiconductor device includes attaching a wafer to a tape, and a ring frame to the tape, the ring frame surrounding an outer edge of the wafer with a gap between the wafer and the ring frame, forming a first coating layer in the gap to contact with the wafer, and a second coating layer in the gap to contact with the ring frame, curing the first coating layer and the second coating layer, forming a sacrificial film on the wafer to contact with the first coating layer that has been cured, and removing the sacrificial film.