Patents Assigned to Samsung Semiconductor
  • Patent number: 10446209
    Abstract: A method and system for providing a magnetic element and a magnetic memory utilizing the magnetic element are described. The magnetic element is used in a magnetic device that includes a contact electrically coupled to the magnetic element. The method and system include providing pinned, nonmagnetic spacer, and free layers. The free layer has an out-of-plane demagnetization energy and a perpendicular magnetic anisotropy corresponding to a perpendicular anisotropy energy that is less than the out-of-plane demagnetization energy. The nonmagnetic spacer layer is between the pinned and free layers. The method and system also include providing a perpendicular capping layer adjoining the free layer and the contact. The perpendicular capping layer induces at least part of the perpendicular magnetic anisotropy in the free layer. The magnetic element is configured to allow the free layer to be switched between magnetic states when a write current is passed through the magnetic element.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: October 15, 2019
    Assignee: Samsung Semiconductor Inc.
    Inventors: Steven M. Watts, Zhitao Diao, Xueti Tang, Kiseok Moon, Mohamad Towfik Krounbi
  • Publication number: 20140281338
    Abstract: A host receives information related to garbage collection of a storage device, and it controls selective execution of garbage collection by the storage device according to the received information.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicant: SAMSUNG SEMICONDUCTOR CO., LTD.
    Inventors: SANG HOON CHOI, HYUNG JIN IM, JEONG UK KANG, MOON SANG KWON
  • Publication number: 20140082398
    Abstract: An embedded multimedia card (eMMC) is provided. The eMMC includes a clock channel receiving a clock output from a host, data channels receiving data signals from the host, and a command channel receiving a SWITCH command including delay offset values from the host so as to adjust a delay of at least one of the data signals, which are received, in response to the delay offset values.
    Type: Application
    Filed: September 13, 2013
    Publication date: March 20, 2014
    Applicant: SAMSUNG SEMICONDUCTOR CO., LTD.
    Inventors: JUNG PIL LEE, YOUNG GYU KANG, SUNG HO SEO, MYUNG SUB SHIN, KYUNG PHIL YOO, KYOUNG LAE CHO, JIN HYEOK CHOI, SEONG SIK HWANG
  • Publication number: 20130235648
    Abstract: A resistive memory device comprises a resistive memory cell, and a read/program circuit configured to program the resistive memory cell from a first state to a second state. The read/program circuit reads a resistance in the first state of the resistive memory cell and adjusts a compliance current supplied to the resistive memory cell according to the read resistance during the program operation.
    Type: Application
    Filed: February 13, 2013
    Publication date: September 12, 2013
    Applicant: SAMSUNG SEMICONDUCTOR CO., LTD.
    Inventors: DAE HAN KIM, CHEON AN LEE
  • Patent number: 7425933
    Abstract: Embodiments of the present invention relate in general to systems and methods for dynamically correcting color cross-talk and related color distortion in an image sensor. More specifically, but not by way of limitation, certain embodiments of the present invention relate to correcting pixel outputs from a pixel array in an image sensor at the Bayer domain for color cross-talk and/or green disparity using hyperbolically varying correction functions to dynamically derive color cross-talk correction factors using pixel location on the pixel array, a selected pixel output and related outputs from neighboring pixels on the image sensor prior to or synchronous with color interpolation.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: September 16, 2008
    Assignee: Samsung Semiconductor Israel R&D Center (SIRC)
    Inventors: Eugene Fainstain, Shlomo Polonsky, Miriam Fraenkel, Yoav Lavi
  • Patent number: 7420602
    Abstract: Systems, methods and devices related to detecting and transmitting images. Imaging systems and devices, as well as methods of using such that are provided herein include flicker detection and/or correction; and/or built-in self test associated with various analog circuitry in the imaging devices; and/or power reduction ability; and/or pixels with charge evacuation functionality; and/or a parallel to serial conversion unit and associated serial output interface; and/or other advanced functionality.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: September 2, 2008
    Assignee: Samsung Semiconductor Israel R&D Center (SIRC)
    Inventors: Miriam Fraenkel, Tiberiu C. Galambos, German Voronov, Alexander Shnayder, Ben Furman, Yair Elmakias, Ilia Antsiferov
  • Patent number: 5995994
    Abstract: The expression A-sign(A), where A is a signed binary integer represented in 2's complement form, sign(A) is equal to one when A is greater than zero, sign(A) is equal to zero when A is zero, and sign(A) is equal to negative one when A is less than zero, is calculated by bit-complementing A, bit-complementing (A-1) when A is less than zero, bit-complementing A when A is equal to zero, and bit-complementing (A+1) when A is greater than zero. Zero detect for A is provided by determining whether a first carry-out bit from (A+0) and a second carry-out bit from (A+1) have different logical values. In this manner, A-sign(A) can be calculated by a general purpose computer in a single instruction cycle.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: November 30, 1999
    Assignee: Samsung Semiconductor, Inc.
    Inventor: Roney S. Wong
  • Patent number: 5856936
    Abstract: The expression A-sign(A), where A is a signed binary integer represented in 2's complement form, sign (A) is equal to one when A is greater than zero, sign (A) is equal to zero when A is zero, and sign (A) is equal to negative one when A is less than zero, is calculated by bit-complementingA, bit-complementing (A-1) when A is less than zero, bit-complementing A when A is equal to zero, and bit-complementing (A+1) when A is greater than zero. Zero detect for A is provided by determining whether a first carry-out bit from (A+0) and a second carry-out bit from (A+1) have different logical values. In this manner, A-sign (A) can be calculated by a general purpose computer in a single instruction cycle.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: January 5, 1999
    Assignee: Samsung Semiconductor, Inc.
    Inventor: Roney S. Wong
  • Patent number: 5850347
    Abstract: The expression 2A+sign(A), where A is a signed binary integer represented in 2's complement form, sign(A) is equal to one when A is greater than zero, sign(A) is equal to zero when A is zero, and sign(A) is equal to negative one when A is less than zero, is calculated by bit-complementing A, bit-complementing (A+A+2) when A is less than zero, bit-complementing (A+A+1) when A is equal to zero, and bit-complementing all bits except a least significant bit of (A+A+1) when A is greater than zero. Zero detect for A is provided by determining whether a first carry-out bit from (A+A+1) and a second carry-out bit from (A+A+2) have different logical values. In this manner, 2A+sign(A) can be calculated by a general purpose computer in a single instruction cycle.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: December 15, 1998
    Assignee: Samsung Semiconductor, Inc.
    Inventor: Roney S. Wong
  • Patent number: 5805133
    Abstract: A frame buffer including a memory array, circuitry for accessing the array, a plurality of latches each capable of storing a plurality of pixel values equivalent to a large portion of a row of pixels in the array which may be read simultaneously from the array, and circuitry for writing simultaneously to the memory cells of a row of the array the data stored in the latches whereby a row of pixels may be read and written back to the array bus in a minimum time period.
    Type: Grant
    Filed: November 22, 1996
    Date of Patent: September 8, 1998
    Assignees: Samsung Semiconductor, Inc., Sun Microsystems, Inc.
    Inventors: Curtis Priem, Chris Malachowsky, Rick Silverman, Shuen Chin Chang
  • Patent number: 5654742
    Abstract: A frame buffer designed to allow frame buffer operations which do not involve new row addresses to be accomplished without the need for a RAS cycle. The elimination of RAS cycles for address loading and similar functions substantially accelerates the operation of the frame buffer both as to functions which do not involve memory array addresses and those which do involve memory array addresses.
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: August 5, 1997
    Assignees: Sun Microsystems, Inc., Samsung Semiconductor, Inc.
    Inventors: Curtis Priem, Chris Malachowsky, Shuen Chin Chang, Hai Duy Ho
  • Patent number: 5649127
    Abstract: A system device of a PC, XT or AT type computer having an ISA bus is provided with a dynamic 32-bit bus by packing circuits or PACs (142, 152) located on user add-on cards. Each PAC includes a state machine (200) which controls four tag registers (210, 211, 212, 213), four input data registers (220, 221, 222, 223), four output data registers (240, 241, 242, 243), and an output multiplexer (250). The four tag registers are for storing a byte-high enable signal BHEN and system address bits SA[1:0] associated with bytes, words, and doublewords presented to the PAC during bus write cycles. The four input data registers are for storing the bytes, words, and doublewords presented to the PAC during bus write cycles. These bytes, words, and doublewords are steered to appropriate bit positions in the input data registers by four steering circuits (214, 215, 216, 217), which are controlled by the platform type signal CR2B2.sub.-- 1 and by the output of a decoder decoding the outputs of the tag registers.
    Type: Grant
    Filed: May 4, 1994
    Date of Patent: July 15, 1997
    Assignee: Samsung Semiconductor, Inc.
    Inventor: Chia-Lun Hang
  • Patent number: 5589831
    Abstract: A differential flash ADC includes an input follower differential input stage for receiving a differential input signal. The outputs of the differential input stage are coupled to legs of a differential resistive ladder having nodes cross-coupled to the inputs of a comparator array. Each leg of the differential resistor ladder is terminated by a current source.
    Type: Grant
    Filed: January 30, 1995
    Date of Patent: December 31, 1996
    Assignee: Samsung Semiconductor, Inc.
    Inventor: Derek L. Knee
  • Patent number: 5574411
    Abstract: A balun, which does not use magnetic coupling and is easily integrated in MMICs, is formed of lumped parameter inductive and capacitive circuit elements. In one embodiment, a termination circuit is utilized to prevent reflections of common mode signals.
    Type: Grant
    Filed: September 25, 1995
    Date of Patent: November 12, 1996
    Assignee: Samsung Semiconductor, Inc.
    Inventors: Thomas R. Apel, Charles E. Page
  • Patent number: 5539430
    Abstract: A frame buffer including an array of memory cells for storing data indicating pixels to be displayed on the output display, row addressing decoding apparatus and column address decoding apparatus for selecting memory cells positioned in the array, apparatus for transferring a row address to the row addressing decoding apparatus upon the assertion of a row address strobe signal, apparatus for transferring a column address to the column address decoding apparatus for decoding upon the assertion of a first column address strobe signal, apparatus for latching a column address and any data necessary to complete the access during the first column address strobe signal, apparatus for accessing the particular column the address of which has been latched during the latching of a next subsequent address of a column to be accessed along with any data necessary to complete the next access during the next subsequent column address strobe signal following the first column address strobe signal.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: July 23, 1996
    Assignees: Sun Microsystems, Inc., Samsung Semiconductor, Inc.
    Inventors: Curtis Priem, Shuen C. Chang, Hai D. Ho
  • Patent number: 5533187
    Abstract: A frame buffer having a memory array, circuitry for accessing the array, a plurality of color value registers for storing a plurality of color values which may be written to the array, and circuitry for writing to the memory cells a data representing a single pixel, for writing simultaneously to the memory cells data representing a number of pixels equal to the number of conductors on the data bus, or for writing simultaneously to the memory cells data representing an entire row of pixels of the array.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: July 2, 1996
    Assignees: Sun Microsystems, Inc, Samsung Semiconductor, Inc.
    Inventors: Curtis Priem, Shuen C. Chang, Hai D. Ho
  • Patent number: 5528751
    Abstract: A frame buffer designed to be coupled to a data bus and to an output display in a computer system, the frame buffer including an array of memory cells for storing data indicating pixels to be displayed on the output display, address decoding apparatus for controlling access to the array, the address decoding apparatus including column address decoding apparatus for selecting groups of adjacent columns of the array, a plurality of apparatus for selectively writing to each of the columns of any of said groups of adjacent columns, a plurality of color value registers, latching apparatus for storing pixel data equivalent to a row of pixel data to be displayed on the output display, apparatus for writing pixel data from selected groups of adjacent columns of the array to the latching apparatus, and apparatus for connecting either selected ones of the color value registers, the latches, or the data bus to the apparatus for selectively writing to each of the columns of any of said groups of adjacent columns.
    Type: Grant
    Filed: September 7, 1995
    Date of Patent: June 18, 1996
    Assignees: Sun Microsystems, Inc., Samsung Semiconductor, Inc.
    Inventors: Curtis Priem, Shuen C. Chang, Hai D. Ho, Szu C. Sun
  • Patent number: 5504855
    Abstract: A frame buffer for accelerating the display of graphics data on an output display device which frame buffer includes a pair of color value registers each of which may be loaded with color values prior to writing to the frame buffer. Selection means are provided for selecting pixel data from the bus, from a first of the color value registers, from the second of the color value registers, or from both color value registers simultaneously. When data is written to the frame buffer from color value registers it may be written to a number of pixel positions simultaneously.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: April 2, 1996
    Assignees: Sun Microsystems, Inc., Samsung Semiconductors
    Inventors: Curtis Priem, Chris Malachowsky, Rick Silverman, Shuen C. Chang
  • Patent number: 5500818
    Abstract: A frame buffer including an array of memory cells, circuitry for accessing the memory cells to derive selected pixel data, and output circuitry for providing data signals at an output port, the output circuitry including circuitry for determining the precise time required for a data signal to rise and fall at the output port, such circuitry being selected to provide the minimum delay between succeeding data signals at the output port.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: March 19, 1996
    Assignees: Sun Microsystems, Inc., Samsung Semiconductor, Inc.
    Inventors: Shuen C. Chang, Hai D. Ho, Szu C. Sun
  • Patent number: 5487049
    Abstract: A page in, burst-out FIFO buffer that stores only words in a single page and transfers the words to a DRAM utilizing a page mode transfer to increase data throughput and decrease latency offloading DRAM bandwidth.
    Type: Grant
    Filed: November 23, 1994
    Date of Patent: January 23, 1996
    Assignee: Samsung Semiconductor, Inc.
    Inventor: Chia-Lun Hang