Abstract: The present invention discloses a URD including: a non-volatile storage memory having program code, wherein said program code is configured to enable a network protocol for communicating with a host system; and a controller for controlling operations performed on said storage memory. Preferably, the storage memory includes flash memory. A URD including: a host system having a firewall; and a URD having a non-volatile storage memory, wherein said storage memory includes program code, and wherein said program code is configured to enable a network protocol, said URD operationally connected to said host system; wherein said firewall is configured to provide security measures related to said URD. Preferably, the firewall is a software firewall or a hardware firewall.

Abstract: The present invention discloses a URD including: a non-volatile storage memory having program code, wherein said program code is configured to enable a network protocol for communicating with a host system; and a controller for controlling operations performed on said storage memory. Preferably, the storage memory includes flash memory. A URD including: a host system having a firewall; and a URD having a nonvolatile storage memory, wherein said storage memory includes program code, and wherein said program code is configured to enable a network protocol, said URD operationally connected to said host system; wherein said firewall is configured to provide security measures related to said URD. Preferably, the firewall is a software firewall or a hardware firewall.

Abstract: A flash memory system including one or more flash memory devices; the flash memory devices are partitioned into multiple units, at least a first unit and a second unit. A mechanism which allocates the units in combination as a super-unit, reserves at least a portion of a first unit field required for managing the super-unit in the first unit and the mechanism reserves at least a portion of a second unit field required for managing the super-unit in the second unit. Preferably, the first unit field and the second unit field are different unit fields, or the first unit field and the second unit field are the same unit field. Preferably, the flash memory device each support at least two planes, and the first unit and the second unit each belong to a different plane. Alternatively, there are two flash memory devices, and the first unit and the second unit each belong to a different flash memory device.

Abstract: A data storage device includes a data storage medium, for example one or more flash memory modules, and a direct interface, to the data storage medium, that supports a file system protocol. Preferably, the data storable device also includes a physical communication interface such as a USB interface or a wireless interface, a user interface and a power source. The scope of the invention also includes appliances that include such data storage devices.

Abstract: A data transmission method includes providing, by a current source, a current to the first conductor while isolating the second conductor from the current source, to thereby transmit a first binary digit; and, responsive to a command to transmit a second binary digit, (i) decreasing from a maximum value to zero an amount of the current provided to the first conductor and (ii) increasing from zero to a maximum value an amount of the current provided by the current source to the second conductor.

Abstract: A system and method for digital communication wherein a host provides a host clock and a clockless device transmits to the host a bit stream synchronized according to the clock at a data rate that is an integer multiple of the clock rate. A training mechanism using training data detects time skew between host clock and bit stream, and a digital skew compensation mechanism compensates, substantially in real time, for the skew and for variations in the skew that may occur with the passage of time, in accordance with a vote among at least three samples of a bit of the bit stream, subsequent sampling being retarded or advanced if, respectively, an early or late sample is in disagreement with the vote. Preferably, the compensation value is selected from at least four possible compensation values, and can be stored in a memory to hasten subsequent restarts of the system.

Abstract: A method of testing a SIP that has a CPU, a nonvolatile memory and a volatile memory. First, the CPU is used to test the memories. Then the CPU is tested separately. Preferably, the programs for testing the memories are pre-stored in and loaded from the nonvolatile memory into the volatile memory and are executed by the CPU in the volatile memory. Preferably, the test results are stored in the nonvolatile memory.

Abstract: A connector for connecting a host device to one or more peripheral devices includes two ports, for example two USB ports, facing in two different, preferably opposite, directions. The scope of the invention also includes a system board that includes the connector, and a host device, such as a computer, that includes the motherboard.

Abstract: Cache flushing is effected for a flash memory by copying, to a block of the memory, first and second portions of cached data, and servicing a host access in-between copying the first portion and the second portion. Either both portions are selected before the copying, or erasing the block is forbidden until after the copying, or a portion of the block left unwritten by the first copying remains unwritten until after the host access is serviced.

Abstract: The present invention is related with the management of memory in environments of limited resources, such as those found for example in a smart card. In a more particular manner, the invention relates to a method of managing the data storage resources of volatile memory, the object of which is to reduce the size of volatile memory necessary to implement the stack of the system, and thereby to reserve more volatile memory available for other needs or procedures of the system or of other applications When the stack grows and comes close to its established limit, the system carries out a transfer of a stack block located in the volatile memory to an area of non-volatile memory, hence this transfer allows a compression of the stack increasing its size in a virtual manner.

Abstract: A memory includes a plurality of flash cells and circuitry for programming a first cell to store first data and one or more second cells to store second data. Either the circuitry itself, or a controller of he memory, or a host of the memory by executing driver code, causes the programming of the first cell to be in accordance with the second data, with at least a portion of the programming of the first cell being effected before any of the programming of the second cell(s).

Abstract: Data are stored in cells of a flash memory by assigning a first portion of the data to be stored in a first cell and a second portion of the data to be stored in one or more second cells. The first cell is programmed to store the first portion in accordance with the second portion. The second cell(s) is/are programmed to store the second portion. At least a portion of the programming of the first cell is effected before any of the programming of the second cell(s).

Abstract: The present invention discloses systems and methods for a smart card including: a first card having a device; and a second card having an aperture that is configured to allow a device to be inserted into an aperture when the second card is properly aligned with the first card, thereby allowing a device to protrude into an aperture. Optionally, the first card includes an aperture, and the second card includes a device, so that an aperture of the first card accommodates a device of the second card when the first card is properly aligned with the second card. Optionally, the apertures and the devices are configured to allow a stack of a plurality of the first and second cards to be densely packed Optionally, a card includes a magnetic stripe, an electronic circuit, and/or an embedded electrically-conductive wire for operationally connecting a device to a connector.

Abstract: Methods for enhancing the performance of a host system including the steps of: providing an operating system, running on the host system, that supports a ReadyDrive and ReadyBoost accelerator; and providing a flash-memory storage device, which supports both the accelerators, having a single flash-memory module. Preferably, the method further includes the steps of: monitoring a frequency of write commands by the host system to the device; and upon the frequency exceeding a predefined threshold, suspending operations of the accelerators until the frequency is below the threshold.

Abstract: The present invention discloses a flash-memory storage device for implementing both ReadyBoost and ReadyDrive Windows PC accelerators, the device including: a single flash-memory module adapted to be configured as a ReadyBoost accelerator and as a ReadyDrive accelerator; and a controller for controlling the flash-memory module. Preferably, the device further includes: a mechanism for wear-leveling the flash-memory module. Preferably, the device further includes: a mechanism for repartitioning the flash-memory module. Most preferably, the mechanism is configured to erase the flash-memory module. A flash-memory storage device including: a flash-memory module having at least one partition, wherein at least one partition is adapted to be alternatively reversibly configured as a ReadyBoost accelerator and as a ReadyDrive accelerator; and a controller for controlling the flash-memory module. Preferably, the device further includes: a mechanism for wear-leveling the flash-memory module.

Abstract: Embodiments of the present invention relate to an apparatus, method and computer readable medium for recovering from a failed or aborted outgoing data transfer operation from a host device to a peripheral storage device. In some embodiments, before the peripheral storage device is corrupted by the failed outgoing data transfer operation, one or more recovery data objects are stored on the host-side. After the peripheral storage device is corrupted by the failed data transfer, the host device responds to a subsequent coupling with the peripheral storage device by repairing the corrupted peripheral storage device using one or more of the host-side stored recovery data objects. Optionally, the host device also restores the outgoing aborted or failed data transfer operation.

Abstract: A peripheral device for connecting to a host includes a body and a peripheral connector attached to the body. The peripheral connector is connectable to a connector of the host. The peripheral device is configured to facilitate manual attachment to the host and to impede manual detachment from the host. Also provided a peripheral device that includes a body, a first connector connectable to the host connector and a second connector connectable to a connector of an add-on peripheral device; where the body, the first connector and/or the second connector are configured to facilitate manual attachment to the host and to impede manual detachment from the host.

Abstract: An improved memory card includes an interface for receiving content from an appliance, a primary memory, a secondary memory, and primary controller. The primary controller is configured to selectively write the content only on the primary memory card, or only on the secondary memory card, or on both memories. The improved memory card also includes an enclosure for enclosing the primary memory, the secondary memory, the primary host interface and the primary controller. The improved memory card also includes a user interface that includes a user-operable mode switch that is switchable between a “full capacity” mode and a “fall redundancy” mode. In the “full capacity” mode the secondary memory is used for recording genuine content, whereas in the “full redundancy” mode the secondary memory is used for backing up content that has been recorded on the primary memory. A digital shoebox is also provided, which can use improved memory cards and conventional memory cards alike for archiving content.

Abstract: To store an input string of M N-tuples of bits, a substitution transformation is selected in accordance with the input string and is applied to the input string to provide a transformed string of M N-tuples of bits. M or more memory cells are programmed to represent the transformed string and preferably also to represent a key of the transformation. Alternatively, the memory selectively programs each of M or more cells to a respective one of 2N states. A mapping that maps the binary numbers in [0,2N?1] into respective states is selected in accordance with the input string and is used to program M cells to represent the input string. Preferably, a key of the mapping is stored in the memory in association with the M cells.

Abstract: An apparatus, method and computer readable medium for disambiguating commands with respect to logical protocols is disclosed herein. In some embodiments, commands are disambiguated in accordance with an extent of device usage since a most recent device reset event. In some embodiments, commands are disambiguated in accordance with one or more command target parameters of a current command and/or one or more previous commands. In some embodiments, commands are disambiguated in accordance with a security policy and/or a data access policy and/or an indication of a data damage risk.