Abstract: Methods and systems for improving the reliability of data stored within a semiconductor memory over a wide range of operating temperatures are described. The amount of shifting in the threshold voltages of memory cell transistors over temperature may depend on the location of the memory cell transistors within a NAND string. To compensate for these variations, the threshold voltages of memory cell transistors in the middle of the NAND string or associated with a range of word lines between the ends of the NAND string may be adjusted by increasing the word line voltages biasing memory cell transistors on the drain-side of the selected word line when the read temperature is greater than a first threshold temperature and/or decreasing the word line voltages biasing memory cell transistors on the source-side of the selected word line when the read temperature is less than a second threshold temperature.

Abstract: Systems and methods for reducing residual electrons within a NAND string subsequent to performing a sensing operation using the NAND string or during the sensing operation. A middle-out programming sequence may be performed in which memory cell transistors in the middle of the NAND string are programmed and program verified prior to programming and verifying other memory cell transistors towards the drain-side end of the NAND string and/or the source-side end of the NAND string. In one example, for a NAND string with 32 memory cell transistors corresponding with word lines WL0 through WL31 from the source-side end of the NAND string to the drain-side end of the NAND string, the memory cell transistor corresponding with word line WL16 may be programmed and program verified prior to programming the memory cell transistors corresponding with word lines WL15 and WL17.