Abstract: A logic control and safety circuit for an electrically actuated gate, or the like. Upon command, a counter directs pulses from a free running oscillator of selective frequency to timer and motor control circuitry, effecting sequential gate operations. The normal gate sequence includes open, pause, and close cycles. Electro-mechanical and electrical safety features are included should the gate encounter an obstruction during either the open or the close cycles, or fail to complete a cycle for any reason. Automatic reset circuitry advances the gate through a "close" cycle following a power failure.