Abstract: Graphics are drawn with an input pen, which is provided with an optical sensor at its tip, on a display surface of an EL display. At this time, the EL display is caused to emit light in dot sequence, and the position of the input pen is detected as coordiante information on the basis of timing of light emission of the EL display and timing of light emission detection of the input pen.

Abstract: A projector device adapted to project an image-forming beam using a lamp as a light source. The lamp is installed within a rectangular parallelepipedal housing, and an exhaust fan is disposed to the rear of the lamp. The top wall of the housing surrounding the lamp is given an opening pattern asymmetric about the optical axis of the lamp by forming an air inlet opening in a position deviated from the optical axis is toward a direction orthogonal to the axis for producing a swirling air current within the housing by operating the exhaust fan. The lamp can be effectively cooled with reduced quantities of air.

Abstract: A battery module has a plurality of electrically connected unit cells fixed in a container. A buffer member is provided at the void between the inner wall of the container and the unit cell. By virtue of the buffer member in the battery module formed of a heat conductive elastic body, the requirement of vibration resistance can be met by the buffer member while the heat generated by the unit cell can be easily discharged via the buffer member. Thus, a battery module suppressed in degradation of the performance of the unit cell caused by heat can be provided.

Abstract: Two types of solar cell modules having an equal output voltage and different sizes are used, and a plurality of solar cell modules of these two types are installed so that they are connected in parallel. The size of a solar cell module having two solar cell sub-modules is two times larger than the size of a solar cell module including one solar cell sub-module. By connecting two power generating regions of each of the solar cell sub-modules of the former solar cell module in parallel, connecting adjacent two solar cell sub-modules in series and connecting two power generating regions of the solar cell sub-module of the latter solar cell module in series, an equal output voltage is obtained from both of the solar cell modules.

Abstract: A PLL circuit that optimally generates a clock signal with two reference signals having different frequencies. The PLL circuit includes a VCO for generating the clock signal in accordance with a control voltage. A first loop controls the frequency of the clock signal in accordance with a first reference signal. A second loop controls the phase of the clock signal in accordance with a second reference signal, whose cycle is longer than that of the first reference signal. The second loop supplies the VCO with the control voltage at a constant value until the difference between the frequencies of the first reference and clock signals converges to within a predetermined range. Then, the second loop supplies the VCO with a control voltage at a level corresponding to the difference between the phases of the second reference and clock signals.

Abstract: A wiring structure for a transmission line has a ground line (2) and a signal line (1). The signal line (1) is disposed so as to face the ground line (2) through a dielectric (3). A surface of the signal line (1) facing the ground line (2) has a groove extending in the transmission direction. A surface of the ground line (2) facing the signal line (1) also has a groove extending in the transmission direction. The grooves restrain that electromagnetic induction is caused in the signal line (1) due to an electromagnetic field generated by other adjacent signal lines (1).

Abstract: Since a 5 GHz-band broadband has a frequency twice that of 2.4 GHz, the parasitic capacitance greatly influences deterioration in isolation of a switching device used in this frequency region. Therefore, to improve isolation, a shunt FET is added to the device. The switching device also includes a protecting element that has a first n+-type region, an insulating region and a second n+-type region. This protecting element is connected in parallel between two electrodes of the shunt FET. Since electrostatic charges are discharged between the first and second n+-type regions, the electrostatic energy reaching an operation region of the shunt FET can be reduced without an increase in parasitic capacitance.

Abstract: An object is to provide a low-temperature storage cooled/maintained in an ultra low temperature range, in which door lowering is automatically modified (corrected) by an opening/closing operation of a thermal insulating door, and a concave/convex portion which is a contact portion with respect to a door switch disposed on the door can be secured, and there is provided a low-temperature storage comprising: a thermal insulation box main body having an opening in a front surface thereof; a thermal insulating door openably/closably attached to the thermal insulation box main body by a plurality of hinges to close the opening; and a cooling device which cools a storage chamber formed by the door and the main body, wherein a spacer having a guide surface to forcibly correct door lowering by a closing operation of the thermal insulating door is disposed on a side on which any hinge is not disposed.

Abstract: A current control circuit controls a current from a current drawing circuit to which a primary coil of a transformer is connected. A first N channel transistor has a source connected to the current drawing terminal and has a body diode that directs a current from the source to a drain. A second N channel transistor has a drain connected to the drain of the first N channel transistor and a source connected to a ground. The second N channel transistor has a body diode that directs a current from the source to the drain. The first and second N channel transistors are turned on to direct a current from the current drawing terminal to the ground via the first and second N channel transistors. The first and second N channel transistors are turned off to stop the current from the current drawing terminal. Further, the body diode of the first N channel transistor inhibits current flowing from the ground to the primary coil of the transformer.

Abstract: A Schottky barrier diode in which a p+-type semiconductor layer is provided in an n?-type epitaxial layer can realize lowering the forward voltage VF without considering leak current IR. However, when compared with a normal Schottky barrier diode, the forward voltage VF is generally high. When a Schottky metal layer is suitably selected, although the forward voltage VF can be reduced, there is a limit in further reduction. On the other hand, when the resistivity of the n?-type semiconductor layer is reduced, although the forward voltage VF can be realized, there is a problem that breakdown voltage is deteriorated. In a semiconductor device of the invention, a second n?-type semiconductor layer having a low resistivity is laminated on a first n?-type semiconductor layer capable of securing a specified breakdown voltage. P+-type semiconductor regions are made to have depths equal to or slightly deeper than the second n?-type semiconductor layer.

Abstract: An object is to provide a low-temperature storage capable of further dividing a medium storage chamber divided by a medium partition into upper/lower small sections (small storage chambers) by adding of an optional component and changing of an inner door, and the storage comprising; a thermal insulation box main body having an opening in a front surface thereof; a thermal insulating.

Abstract: The present invention provides a package for light emitting element having a base substrate and a frame body mounted on an upper surface of the base substrate to form a cavity for housing a light emitting element therein. The frame body has an inner peripheral surface formed with a first reflecting layer. Furthermore, the base substrate has an upper surface formed with a pair of land layers for mounting the light emitting element thereon. One of the land layers has an outer peripheral portion connected to a lower end portion of the reflecting layer. The other land layer includes an exposure portion exposed on the upper surface of the base substrate, and a buried portion buried inside the base substrate. Further, the base substrate has a second reflecting layer formed below an area exposed on the bottom surface of the cavity.

Abstract: A solid electrolytic capacitor constituted by forming a dielectric coating film, a solid state electrolyte layer, and cathode lead-out layer in order on the surface of an anode body comprising niobium or an alloy containing niobium as the main component to an end of which an anode lead member is implanted to construct a capacitor element, connecting the anode lead member with an anode terminal and connecting the cathode lead-out layer, at the same time, with a cathode terminal, and being covered and sealed by a sheath resin, in that the sheath resin is formed by injecting and filling liquid silicone resin and heat curing molding the same.

Abstract: This invention provides a drive system of a display device preventing an uneven display caused by output current values of current conversion circuits. A drive system of a display device of the invention has a plurality of pixels disposed in a matrix of m rows and n columns and having current drive elements, n pieces of current conversion circuits converting digital display signals inputted from outside into analog signals corresponding to the digital display signals, a first selector circuit selectively supplying the digital display signals to the n pieces of the current conversion circuits, and a second selector circuit selectively supplying current outputs of n pieces of the current conversion circuits to pixel groups divided in columns.

Abstract: A solid electrolytic capacitor formed with a dielectric coating and a solid electrolyte layer successively formed on a surface of an anode body, wherein the solid electrolyte layer includes a conductive polymer containing at least a fluoroalkylnaphthalenesulfonate ion as a dopant. The conductive polymer can further contain a tetrahydronaphthalenesulfonate ion, a naphthalenesulfonate ion or a benzenesulfonate ion as the dopant. As a result, a solid electrolytic capacitor having a low ESR and a good heat resistance is provided.

Abstract: An electroluminescent display device includes an anode, a cathode and a light emitting layer disposed between the anode and the cathode. The display device also includes a substrate allowing light from the light emitting layer to pass through itself and an ultraviolet protection film disposed in an optical path of the light passing through the substrate. Retardation films and polarizers used in conventional electroluminescent display devices are replaced by the ultraviolet protection film with respect to reducing the effect of ultraviolet rays on the degradation of the display characteristics.

Abstract: In an active-type electroluminescent (EL) display, a conductor interconnecting a cathode (55) of an EL panel (30, 40) and a connection terminal of a signal input substrate (35) has a multilayer structure formed of a cathode material and a conductive material used in a thin-film transistor forming step. The conductor may be formed of a conductive material used in a thin film transistor forming step. A metal material for a gate electrode or drain electrode is preferably used as the conductive material. The connection conductor structure can reduce the electrical resistance of the connection conductor, thus preventing a decrease in display intensity of an EL display.

Abstract: A lead frame has an array of mounting portions connected by joint bars, and each of the mounting portions has an island serving as an external connection terminal and a plurality of lead terminals extending from the island and serving as external connection terminals for a semiconductor chip to be mounted on an adjacent island along the array. An electrically conductive paste is applied to the island, and a semiconductor chip is mounted on the island. Then, the semiconductor chip is electrically connected to the lead terminals by wires. A resin layer is deposited over the semiconductor chip, a principal surface of the island, and principle surfaces the lead terminals, while leaving opposite surfaces of the island and the lead terminals exposed. A region surrounding the island and the lead terminals electrically connected to the island is cut off into a package.

Abstract: An evaporation apparatus comprises an elongated crucible having an upper opening and storing an evaporation material, an electric heater which covers the upper opening of the elongated crucible, generates heat by causing electric current to flow therein for heating the evaporation material stored in the crucible, and has an opening through which the evaporation material which is vaporized by heating can pass through, and a fixing member for pressing and fixing the electric heater onto the elongated crucible. Further, between the fixing member and the electric heater, an angle member having surface portions respectively fitting onto an edge portion of the upper surface and an upper portion of the side surface of the elongated crucible is provided along the longitudinal direction of the elongated crucible. A pressing force from the fixing member is made to exert onto the electric heater via the angle member to bring the electric heater into close contact with the elongated crucible.

Abstract: This invention offers a manufacturing method which does not cause a reduction in thickness of a silicon substrate or a carbon contamination in forming a transistor having an LDD stricture and silicide layers formed by a salicide technology. After a gate electrode is formed on the silicon substrate through a gate insulation film, an insulation film made of the same material as the gate insulation film is formed on the gate electrode. A first insulation film made of a material different from the material of the gate insulation film and the insulation film on the gate electrode and a second insulation film made of the same material as the material of the gate insulation film and the insulation film on the gate electrode are formed over the silicon substrate. Spacers made of the second insulation film are formed by dry-etching. Then the LDD structure and openings for forming the silicide layers are formed using wet-etching.