Abstract: A self-managed DRAM module and method. A controller chip is configured to handle data access requests according to a process that includes: searching a first tier for an uncompressed cache data block; in response to a first tier hit, serving the uncompressed cache data block to service the data access request; in response to a first tier miss, searching a second tier for a compressed cache data block; in response to a second tier hit, decompressing the compressed cache data block to generate a decompressed cache data block, and inserting the decompressed cache data block into the first tier to service the data access request; and in response to a second tier miss, reading a compressed data block from DRAM, decompressing the compressed data block to generate a decompressed data block, and inserting the decompressed data block into the first tier to service the data access request.

Abstract: A memory drive and associated method. The memory drive includes: a plurality of solid-state devices (SSDs); a plurality of dynamic random-access memory (DRAM) devices; and a controller configured to implement a data management process. The data management process includes: partitioning the DRAM devices into SSD-domain DRAM having a mapping table and a CXL-domain DRAM having a system memory space that is directly accessible by a host CPU; and processing read requests from the host CPU for data in the SSDs, including writing requested data into the system memory space of the CXL-domain DRAM, and then writing the requested data from the CXL-domain DRAM to the host CPU using a CXL transport protocol.

Abstract: A system and method for processing errors in a self-managed DRAM module. A method includes receiving a block of code symbols comprising s code segments; loading the code symbols into a bank of list-decoding modules, wherein each module is configured to correct errors in a specific combination of code-segments from the block; for each list-decoder module, erase code symbols and calculate replacement code symbols to form a valid codeword; for each valid codeword, determine a codeword metric based on a number of corrections between the replacement code symbols and the erased received symbols; identify a first and a second valid codeword from the set of unique codewords generated by a bank of list-decoder modules having a minimum codeword metric and a second minimum codeword metric, respectively; and correct the first valid codeword if, based on the minimum and second minimum codeword metric, no decoding error is detected.

Abstract: A multimode solid-state drive (SSD) and associated method. An SSD includes: a plurality of flash memory chips addressable via a physical block address (PBA); and a controller chip configured to map logical block addresses (LBAs) from a host to PBAs, wherein the controller chip is further configured to handle different LBA block sizes according to a process that includes: partitioning a base partition to store one a long code word of size Clong having a single base data block protected with error correction coding (ECC); and partitioning a set of non-base partitions, each partitioned for a plurality of shortened code words, wherein each shortened code word is configured to store a shortened data block protected with ECC, and wherein the plurality of shortened code words are configured to be protected with ECC as a combined long codeword of size Clong.

Abstract: A self-managed DRAM module configured to reduce energy consumption. A module is described that includes a plurality of DDR channels, each DDR channel having a set of DRAM chips; and a management engine configured to read and write data blocks to DDR channels, wherein a write operation of a data block in a DDR channel is implemented according to a process that includes: compressing the data block to generate a compressed data block; encoding the compressed data block to obtain a punctured ECC codeword; determining a reduced number of DRAM chips in the DDR channel required to store the punctured ECC codeword; storing metadata indicative of the reduced number; and writing the punctured ECC codeword to the reduced number of DRAM chips in the DDR channel.

Abstract: A system and method for providing compression and error correction coding (ECC) in a solid-state drive (SSD). A method is provided that includes: determining whether a data item is to be written to flash memory using a general-purpose mode or a zero-padding mode: in response to a determination that a data item is to be written into flash memory using the zero-padding mode: padding the data item with an all-zero tail to form an LBA data block of a predefined size; performing ECC coding on the LBA block to generate an ECC codeword; removing the all-zero tail from the ECC codeword to generate a shortened ECC codeword; and storing the shortened ECC codeword in flash memory.

Abstract: A self-managed DRAM module configured to reduce energy consumption. A module is described that includes a plurality of DDR channels and a management engine configured to read and write data blocks to DDR channels according to a process that includes: allocating a set of sub-channels for each DDR channel, wherein each sub-channel includes a subset of the set of DRAM chips; wherein a write operation of a data block includes: encoding the data block to generate an ECC codeword; and writing the ECC codeword into the subset of DRAM chips of a specified sub-channel; and wherein a read operation of the data block includes: reading the ECC codeword from the subset of DRAM chips of the specified sub-channel; and decoding the ECC codeword to obtain the data block.

Abstract: A hardware decompression acceleration engine including: an input buffer for receiving to-be-decompressed data from a software layer of a host computer; a decompression processing unit coupled to the input buffer for decompressing the to-be-decompressed data, the decompression processing unit further receiving first and second flags from the software layer of the host computer, wherein the first flag is indicative of a location of the to-be-decompressed data in a to-be-decompressed data block and the second flag is indicative of a presence of an intermediate state; and an output buffer for storing decompressed data from the decompression processing unit.

Abstract: Methods for enhancing the speed performance of solid-state storage devices using stream-aware garbage collection. A garbage collection method in according to an embodiment includes: searching, in each of a plurality of super-block groups G, for a super-block set C that satisfies: all of the super-blocks m within the super-block set C in the super-block group G contain a lesser amount of valid data than the other super-blocks within the super-block group G; and a total amount of valid data within the super-block set C are just enough to complete an entire super-block; selecting the super-block group G that includes the super-block set C with the maximum number of super-blocks m; and performing garbage collection on the super-block set C in the selected super-block group G.

Abstract: A storage device that provides in-storage transparent compression and implements a process for processing write requests during an out-of-space state. The process includes: receiving a write request from a host involving a set of logical block addresses (LBAs); determining if each of the LBAs in the write request is an actively used LBAs; and in response to determining that each of the LBAs in the write request are actively used LBAs, allowing the write request to be served; and in response to determining that at least one of the LBAs in the write request is not an actively used LBAs, not allowing the write request to be served and returning an error to the host.

Abstract: A method for implementing a RAID group in a system including a host computing system, a first set of storage devices for storing user data for the RAID group, and a second set of storage devices for storing redundancy data for the RAID group. The method includes: distributing the user data from a host-side FLT module on the host computing system to the first set of storage devices; determining, by each storage device in the first set of storage devices, a logical block address to physical block address (LBA-PBA) binding for the user data received from the host-side FLT module; sending LBA-PBA binding information for the LBA-PBA binding from the first set of storage devices to the host-side FLT module; and performing, by the host-side FLT module, RAID encoding to form the RAID group based on the LBA-PBA binding information received from the first set of storage devices.

Abstract: A method according to embodiments includes: storing an entire hash table of a table R in memory of a computational storage device; storing a second table S in storage media of the computational storage device, the table R being smaller than the table S, wherein the hash JOIN operation is directed to combining a cs-th column in the table S and a cr-th column in the table R; wherein, for each row of the table S, the computational storage device configured to perform a method, including: applying a hash function to a value of the cs-th column to provide a hash result; looking up the hash result in the hash table stored in the memory of the computational storage device; and if the hash result is found, sending the row of the table S and a corresponding row index of the table R to the host computing system.

Abstract: The present disclosure relates to the field of solid-state data storage, and particularly to improving the speed performance and reducing the cost of solid-state data storage devices. A host-managed data storage system according to embodiments includes a set of storage devices, each storage device including a write buffer and memory; and a host coupled to the set of storage devices, the host including: a storage device management module for managing data storage functions for each storage device; memory including: a front-end write buffer; a first mapping table for data stored in the front-end write buffer; and a second mapping table for data stored in the memory of each storage device.

Abstract: The present disclosure relates to the field of solid-state data storage, and particularly to improving the speed performance of solid-state data storage devices by reducing multi-stream data write collision. A method according to embodiments includes: writing a plurality of data chunks in a skewed sequence from a plurality of different data write buffers in the storage device into a plurality of different super-pages across all channels of the storage device.

Abstract: A method for host-side data classification according to embodiments, includes: writing a data sector directly from a host to a storage device; storing the data sector in the storage device; sending a write completion acknowledgement from the storage device to the host; in the background: classifying the data sector on the host to estimate an expected lifetime of the data sector; assigning a data type index to the data sector based on the expected lifetime of the data sector; and asynchronously sending the data type index for the data sector from the host to the storage device.

Abstract: A host-assisted data deduplication system, including: a storage device including a controller, memory, and a write cache; and a host including a data duplication module coupled to the storage device, wherein the controller of the storage device is configured to write a data sector received from the host into the write cache in the storage device and to send a write completion to the host immediately after writing the data sector to the write cache; wherein the data duplication module is configured to detect whether the data sector is identical to another data sector stored in the memory of the storage device and to asynchronously send a duplicate detection result to the controller of the storage device, and wherein the controller of the storage device is configured to perform a data deduplication process for the data sector stored in the write cache based on the duplicate detection result.

Abstract: A method for providing logical block address (LBA) to physical block address (PBA) binding in a storage device includes: receiving at least one thread at a hardware engine of the device controller of the storage device, each thread including data and LBAs for the data; writing the data into a write buffer of the storage device; binding, by the hardware engine of the device controller, a sequence of contiguous PBAs for a section of the memory to the LBAs for the data in the write buffer; determining if the write buffer contains enough data for the section of the memory; and if the write buffer contains enough data for the section of the memory, writing the data to the section of the memory.

Abstract: An infrastructure and method for storing compressed data. On a host, a data zero forcing system causes an unused portion at a tail end of a data sector to be forced to all zeros before being written. On a storage device comprising solid state memory, a zero tail detection system detects and removes a tail end of zeros in the data sector to create a variable size data chunk, and allocates a segment for storing the variable size data chunk. A variable size mapping system is provided that includes: a mapping table that maps a logical block address (LBA) of the variable size data chunk to a physical block address (PBA) entry, wherein the PBA entry includes a segment ID and an index; and a segment utilization table which, for each of a plurality of segments, provides a size of each variable size data chunk stored in the segment.

Abstract: A system and method of implementing distributed metadata checkpointing in a storage device. A storage device is disclosed that includes storage device that employs distributed metadata checkpointing, including: flash memory; and a controller that collects metadata checkpoints and includes: a checkpoint partitioner that partitions a metadata checkpoint into a set of segments; and a segment loader that stores each segment of the set of segments into a spare region of a corresponding different flash memory pages during a write operation of data to flash memory.

Abstract: An enhanced FTL system and method are provided for eliminating redundant write operations. A method is disclosed, including: processing a data write operation from a host that deploys a journaling scheme, wherein the data write operation includes a specified LBA that maps to a PBA in a SSD memory; calculating a signature of a data block during a write operation; detecting whether the data write should be handled as journal or non-journal write operation without assistance from the host; in response to a detected journal write operation, allocating a new PBA, writing the data block to the new PBA, updating a mapping table with a new LBA-PBA mapping, and inserting the signature into a signature table for the new LBA-PBA mapping; and in response to a detected non-journal write operation, mapping the specified LBA to an existing PBA if the signature matches a stored signature in the mapping table.