Abstract: A voltage regulator and method. The voltage regulator includes a first amplifier having: a first input couplable to a reference voltage; a second input coupled to a feedback path; a current mirror; first and second branches coupled to an input and output of the current mirror. A node of the second branch forms an output of the first amplifier. The voltage regulator includes a second amplifier comprising a transistor having: a first terminal couplable to a supply voltage; a gate coupled to the output of the first amplifier; and a second terminal coupled to an output of the voltage regulator. The feedback path is coupled to the output of the voltage regulator. The voltage regulator includes a compensation network having at least one passive component to reduce variations in an output current of the voltage regulator caused by the parasitic capacitance of the transistor and variations in the supply voltage.

Abstract: A signal processor and method. The signal processor includes a signal current path. The signal processor includes a transconductor. The transconductor has an input operable to receive an input voltage of the signal processor. The transconductor also has an output operable to output a current based on the input voltage. The signal processor also includes a processing stage coupled to the output of the transconductor to receive and process the current outputted by the transconductor. The signal processor further includes a current replicator operable to generate a replica current proportional to the current outputted by the transconductor. The signal processor also includes a comparator operable to compare an output of the current replicator with a reference. The signal processor further includes a current limiter operable to limit the current outputted by the transconductor based on the comparison of the output of the current replicator with the reference.

Abstract: A time constant calibration circuit and method. The circuit comprises a resistor, a capacitor, an amplifier, a first switch and a second switch. The resistance of the resistor and/or the capacitance of the capacitor is variable. A first terminal of the resistor, a first terminal of the capacitor and a first input of the amplifier are coupled to a common node, which is coupleable to a reference current source. A second input of the amplifier is coupleable to a reference voltage. An output of the amplifier is coupled to a second terminal of the resistor and a second terminal of the capacitor. The circuit can perform a calibration process comprising one or more calibration cycles in which the switches route a reference current through the resistor in a first phase and through the capacitor in a second phase. The resistance and/or the capacitance is adjusted between calibration cycles.

Abstract: A method for calibrating a multi-bit Delta-Sigma modulator is disclosed herein. The method includes at least one main multi-bit digital-analogue converter in a return loop for generating a return signal subtracted from an input of the modulator. The main converter includes a plurality of elementary source cells at least some of which, referred to as active cells, are associated with the various input bits of the converter for generating the return signal. The output level of these active source cells is adjustable under the action of a matching signal that comes from a calibration circuit receiving an output signal from the modulator at its input. The calibration circuit includes a generator of a calibration sequence.