Abstract: According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

Abstract: The present invention provides a compound and a method of making a compound according to the following formula: where R1 is an alkyl group having 1 to 12 carbons; R2 is a urea group; R3 is an active group, such as fluorescein, a toxin, radiolabel or drug; and R4, R5 and R6 are each independently a halide group.

Abstract: The present invention, provides a flow cytometry apparatus for the detection of particles from a plurality of samples comprising: means for moving a plurality of samples comprising particles from a plurality of respective source wells into a fluid flow stream; means for introducing a separation gas between each of the plurality of samples in the fluid flow stream; and means for selectively analyzing each of the plurality of samples for the particles. The present invention also provides a flow cytometry method employing such an apparatus.

Abstract: A distance of flight (DOF) approach to mass spectroscopy in which the resolution among the various ion masses is accomplished in space rather than time. A separate detector is associated with each ion mass resolution element. The DOF mass spectrometer can serve as one element in a tandem arrangement which has the capability to produce a full two-dimensional precursor/product spectrum for each bunch of ions extracted from the source. A “distance-of-flight” (DOF) mass analyzer is used in combination with time-of-flight (TOF) mass analysis for precursor and product dispersion. All the precursor ions can undergo a mass changing reaction simultaneously, while still retaining the essential information about the particular precursor m/z value from which each product ion m/z value emanated. Through the use of a two-dimensional detector, all the products ions from all the precursors can be detected for each batch of ions analyzed.

Abstract: A radiation power source having a source of radioactive material disposed in at least one hole extending partially through a substrate. A PN junction extends around a predetermined portion of the hole walls. In accordance with one aspect of the present invention, a significant gain in power output is obtained by fabricating the hole so that the ratio of its depth to perimeter is as large as possible. In another embodiment of the present invention, the PN junction surrounding the hole has P and N portions that extend outwardly to opposite sides of the substrate wherein they connect to an associated power . cell lead. This arrangement advantageously simplifies the interconnection of multiple power cells formed on the same substrate.

Abstract: According to the invention, a digital design method for manipulating a digital circuit netlist is disclosed. In one step, a first netlist is loaded. The first netlist is comprised of first basic cells that are comprised of first kernel cells. The first netlist is manipulated to create a second netlist. The second netlist is comprised of second basic cells that are comprised of second kernel cells. A percentage of the first and second kernel cells are selection circuits. There is less chip area consumed in the second basic cells than in the first basic cells. The second netlist is stored. In various embodiments, the percentage could be 2% or more, 5% or more, 10% or more, 20% or more, 30% or more, or 40% or more.

Abstract: According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

Abstract: An application specific integrated circuit is optimized by translating a first representation of its digital design to a second representation. The second representation includes multiple syntactic expressions that admit a representation of a higher-order function of base Boolean values. The syntactic expressions are manipulated to form a third representation of the digital design.

Abstract: According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

Abstract: Logic elements are provided that permit reductions in layout size and avoidance of hazards. Such logic elements may be included in libraries of logic cells. A logical function to be implemented by the logic element is decomposed about logical variables to identify factors corresponding to combinations of the logical variables and their complements. A pass transistor network is provided for implementing the pass network function in accordance with this decomposition. The pass transistor network includes ordered arrangements of pass transistors that correspond to the combinations of variables and complements resulting from the logical decomposition. The logic elements may act as selection circuits and be integrated with memory and buffer elements.

Abstract: The present invention provides probes for HPV types 61, 62, 64, 67, 69, 70, 71, 72, CP6108, CP8304, of IS39. The present invention also provides an assay incorporating one or more of these probes. In addition, the present invention provides a method to detect one or more of HPV types 61, 62, 64, 67, 69, 70, 71, 72, CP6108, CP8304, or IS39, and subtypes and variants thereof.

Abstract: A device for the simultaneous modeling and rendering of three-dimensional objects on a computer display through a tactile user input. The tactile user input consists in part of a closed solid surface. The preferred form of this surface is a ball. This ball is enveloped by a plurality of sensors, all of which can feed electronic signals to a central processing unit equipped for graphical display. The software component of the device contains data structures representing various primitive and other generic solid objects, such as a sphere, a cube, a cylinder, and coarse generic anatomical solids (human head, hand, nose, arm, foot, torso, leg, body, horse head, dog head, etc.). Each primitive or generic solid object has defining nodes which are geometrically correllated to the relative positions of the sensors on the tactile ball. The spatial positions of the nodes are altered in response to tactile stimulus applied to corresponding sensors on the tactile ball.