Abstract: In a computer which superpositions vector and scalar operations and in which operation results and operands are conducted between buffer registers and functional units on a bidirectional databus system, the result of one or more currently-executing scalar operations can be routed directly to the input of one or more functional units, bypassing the buffer registers and saving computer operational time. A scalar result is routed through a linking apparatus which directly connects a bidirectional databus path on which the scalar result is being conducted to a databus path on which a scalar operand is to be conducted. The routing is conditioned upon identity between the scalar result and operand and upon availability of a databus path to support the scalar operation. If the conditions are not met, the scalar result is conducted to the buffer registers, where it is held until needed or until a databus path is available.

Abstract: A backplane structure for a computer includes first and second spaced apart backplane sections each having a series of spaced, vertical connector assemblies for receiving edge connectors of a series of parallel spaced apart circuit boards in a vertical orientation. Spaced bus lines run horizontally across each backplane section for interconnecting appropriate pins of the respective circuit board connectors. One of the backplane sections receives circuit boards of the memory section of a computer, and the other section receives the computer functional unit boards. A third backplane section extends between the first and second sections and has a series of spaced horizontal connector assemblies for receiving connector edges of a series of circuit boards in a horizontal orientation. At least some of the horizontal connector assemblies receive circuit boards of the buffer section of a computer.

Abstract: A bi-directional databusing system is used in a computer that superposes vector and scalar operations. The computer consists of a main memory, a plurality of pipelined functional units, and a buffer for staging scalar and vector data objects between the main memory and the functional units. The busing system supports two-way data transfer during each of a succession of bus transfer cycles in which data is transferred to the buffer during one phase of a cycle, and from the buffer during a second cycle phase. The busing system includes three sets of bi-directional memory databuses, one for transferring scalar data objects between the main memory and buffer unit, and the other two for transferring vector data objects between the main memory and the buffer.