Patents Assigned to sdPhotonics, LLC
  • Patent number: 10886701
    Abstract: A semiconductor vertical light source includes upper and lower mirrors with an active region in between, an inner mode confinement region, and an outer current blocking region that includes a common epitaxial layer including an epitaxially regrown interface between the active region and upper mirror. A conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer. The first and second impurity doped region force current flow into the conducting channel during normal operation of the light source.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: January 5, 2021
    Assignee: sdPhotonics LLC
    Inventor: Dennis G. Deppe
  • Patent number: 10879671
    Abstract: A semiconductor vertical resonant cavity light source includes an upper and lower mirror that define a vertical resonant cavity. An active region is within the cavity for light generation between the upper and lower mirror. At least one cavity spacer region is between the active region and the upper mirror or lower mirror. The cavity includes an inner mode confinement region and an outer current blocking region. An index guide in the inner mode confinement region is between the cavity spacer region and the upper or lower mirror. The index guide and outer current blocking region each include a lower and upper epitaxial material layer thereon with an epitaxial interface region in between. At least a top surface of the lower material layer includes aluminum in the interface region throughout a full area of an active part of the vertical light source.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: December 29, 2020
    Assignee: sdPhotonics LLC
    Inventor: Dennis G. Deppe
  • Patent number: 10673206
    Abstract: A semiconductor device includes an upper and lower mirror. At least one active region for light generation is between the upper and lower mirror. At least one cavity spacer layer is between at least one of the upper and lower mirror and the active region. The device includes an inner mode confinement region and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) including a depleting impurity is within the outer current blocking region of ?1 of the upper mirror, lower mirror, and the first active region. A middle layer including a conducting channel is within the inner mode confinement region that is framed by the DHCBR. The DHCBR forces current flow into the conducting channel during normal operation of the light source.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: June 2, 2020
    Assignee: sdPhotonics LLC
    Inventor: Dennis G. Deppe
  • Patent number: 10033156
    Abstract: A semiconductor vertical light source includes an upper mirror and a lower mirror. An active region is between the upper and lower mirror. The light source includes an inner mode confinement region and outer current blocking region. The outer current blocking region includes a common epitaxial layer that includes an epitaxially regrown interface which is between the active region and upper mirror, and a conducting channel including acceptors is in the inner mode confinement region. The current blocking region includes a first impurity doped region with donors between the epitaxially regrown interface and active region, and a second impurity doped region with acceptors is between the first doped region and lower mirror. The outer current blocking region provides a PNPN current blocking region that includes the upper mirror or a p-type layer, first doped region, second doped region, and lower mirror or an n-type layer.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: July 24, 2018
    Assignees: University of Central Florida Research Foundation, Inc., sdPhotonics, LLC
    Inventor: Dennis G. Deppe
  • Patent number: 9705283
    Abstract: A semiconductor vertical resonant cavity light source includes an upper mirror and a lower mirror that define a vertical resonant cavity. A first active region is within the vertical resonant cavity for light generation between the upper mirror and lower mirror. The vertical resonant cavity includes an inner mode confinement region and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) is within the outer current blocking region of at least one of the upper mirror, lower mirror, and first active region. A conducting channel within the inner mode confinement region is framed by the DHCBR. The DHCBR forces current flow into the conducting channel during operation of the light source. A cavity length within the inner mode confinement region equals or exceeds the cavity length formed in the DHCBR.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: July 11, 2017
    Assignees: University of Central Florida Research Foundation, Inc., sdPhotonics, LLC
    Inventors: Dennis G. Deppe, Guowei Zhao
  • Patent number: 8774246
    Abstract: A semiconductor vertical resonant cavity light source includes an upper mirror and a lower minor that define a vertical resonant cavity. A first active region is within the vertical resonant cavity for light generation between the upper minor and lower mirror. The vertical resonant cavity includes an inner mode confinement region and an outer current blocking region. A depleted heterojunction current blocking region (DHCBR) is within the outer current blocking region of at least one of the upper minor, lower minor, and first active region. A conducting channel within the inner mode confinement region is framed by the DHCBR. The DHCBR forces current flow into the conducting channel during operation of the light source.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: July 8, 2014
    Assignees: University of Central Florida Research Foundation, Inc., sdPhotonics, LLC
    Inventors: Dennis G. Deppe, Sabine M. Freisem