Abstract: An apparatus is disclosed. The apparatus includes a storage layer, a thermal exchange control layer disposed over the storage layer, and a write layer disposed over the thermal exchange control layer. A Curie temperature of the thermal exchange control layer is lower than a Curie temperature of the storage layer. The Curie temperature of the thermal exchange control layer is lower than a Curie temperature of the write layer.
Abstract: Higher-level redundancy information computation enables a Solid-State Disk (SSD) controller to provide higher-level redundancy capabilities to maintain reliable operation in a context of failures of non-volatile (e.g. flash) memory elements during operation of an SSD implemented in part by the controller. For example, a first computation is an XOR, and a second computation is a weighted-sum. Various amounts of storage are dedicated to storing the higher-level redundancy information, such as amounts equivalent to an integer multiple of flash die (e.g. one, two, or three entire flash die), and such as amounts equivalent to a fraction of a single flash die (e.g. one-half or one-fourth of a single flash die).
Abstract: Data is written to a recording medium via a read/write head. Subsequent to the writing, the data is read via a read transducer of a read/write head. An instability indicator is derived based on measurements performed while the reading the data. If the instability indicator exceeds a threshold, a current applied to a write coil of the read/write head is changed for subsequent write operations.
Type:
Grant
Filed:
February 17, 2017
Date of Patent:
May 22, 2018
Assignee:
Seagate Technology LLC
Inventors:
Wenzhong Zhu, Alfredo Sam Chu, Siew Kin Chow
Abstract: A slider configured for heat-assisted magnetic recording comprises an air bearing surface (ABS), a writer, and a close point of the writer. A plurality of heat producing or dissipating components are situated a predetermined distance from a vertical plane that is normal to the ABS and aligned with the close point. A location of the writer close point remains substantially consistent irrespective of which of the plurality of heat producing or dissipating components are energized.
Type:
Grant
Filed:
February 28, 2017
Date of Patent:
May 22, 2018
Assignee:
Seagate Technology LLC
Inventors:
Zoran Jandric, Vasudevan Ramaswamy, Erik J. Hutchinson, John Charles Duda
Abstract: A slider is configured for heat-assisted magnetic recording and comprises an NFT and a transparent thermocouple configured to produce a signal indicative of temperature at the NFT. A detector can be coupled to the thermocouple and configured to detect one or both of spacing changes and contact between the slider and a magnetic recording medium.
Type:
Grant
Filed:
October 28, 2016
Date of Patent:
May 22, 2018
Assignee:
Seagate Technology LLC
Inventors:
Declan Macken, Patrick Carl Fletcher, Song Chen
Abstract: An apparatus includes a heat pipe with a fluid path. A first part of the fluid path is thermally coupled to a first region of a higher temperature and a second part of the fluid path thermally is coupled to a second region of a lower temperature. A difference between the higher temperature and the lower temperature induces a flow of a magnetic fluid in the fluid path. A switchable magnetic device is magnetically coupled to the fluid path. Activation of the switchable magnetic device reduces the flow of the magnetic fluid in the fluid path, which reduces heat transfer from the first region to the second region.
Type:
Grant
Filed:
January 27, 2015
Date of Patent:
May 22, 2018
Assignee:
Seagate Technology LLC
Inventors:
Kevin Arthur Gomez, Jon Trantham, David Tetzlaff, Mai A. Ghaly
Abstract: A read/write head has an input coupler that receives light at a fundamental mode from an energy source. A mode converter of the read/write head converts light from the fundamental mode to a higher-order mode. The read/write head has a bent waveguide coupled to the mode converter at an interface. The bent waveguide includes a curve with a taper. The taper nullifies the fundamental mode generated in the curve and recovers the higher-order mode at an output of the bent waveguide. A near-field transducer that receives the output of the bent waveguide is offset from the facet of the input coupler in a cross-track direction.
Abstract: A method may generate a demodulated sine component for a sequence of samples of a servo burst window of a position error signal using a sine weight look up table and generate a demodulated cosine component for the sequence of samples of the servo burst window of the position error signal using a cosine weight look up table. The sine weight and the cosine weight look up tables may have indexes representing a phase range. The method may generate a demodulated phase component signal and a demodulated amplitude component signal for the sequence of samples of the servo burst window of the position error signal based on the demodulated sine component and the demodulated cosine component using a Coordinate Rotation Digital Computer at least in part by iteratively rotating a vector based on the demodulated sine component and the demodulated cosine component and summing angular changes in the vector.
Type:
Grant
Filed:
December 23, 2016
Date of Patent:
May 22, 2018
Assignee:
Seagate Technology LLC
Inventors:
Marcus Marrow, Jason Vincent Bellorado, Trung Thuc Nguyen
Abstract: The disclosure is related to systems and methods of nonvolatile data caching. In some embodiments, circuits or methods may be configured to store selected data to a nonvolatile data cache based on selection criteria. The selection criteria may be based on previous data access commands. The selection criteria may relate an amount of resources, such as time or power, needed to retrieve the selected data from a data storage medium. The selected data may be retrieved from the data storage medium and stored at the nonvolatile data cache during an idle state.
Type:
Grant
Filed:
March 31, 2011
Date of Patent:
May 22, 2018
Assignee:
Seagate Technology LLC
Inventors:
Stanton MacDonough Keeler, Steven Scott Williams, Robert William Dixon
Abstract: Methods, systems, and computer-readable storage media for performing scattered atomic I/O writes in a storage device. A list of block I/O write requests to be completed as an atomic unit is received from a requester with at least two of the block I/O write requests specifying non-contiguous data locations on a storage media. The plurality of block I/O write requests are buffered in a write buffer with each buffer entry marked as having an invalid state, wherein marking a buffer entry as having an invalid state prevents it from being flushed to the storage media. Upon buffering all of the plurality of block I/O writes, all of the buffer entries are marked as having a valid state at the same time. Upon marking all of the buffer entries as having a valid state, successful completion of the list of block I/O write requests is acknowledged to the requester.
Abstract: Apparatus and method for managing a media cache of a data storage device. In some embodiments, a media cache master table is maintained in a memory as a data structure having a plurality of entries that describe data sets stored in a non-volatile media cache memory. A first timecode stamp value is written to respective first and second locations in the table at the commencement of a data transfer operation to transfer data associated with the plurality of entries in the table. The first location is updated with a new, second timecode stamp value responsive to detection of an error condition that interrupts the data transfer operation. An error recovery operation is subsequently performed responsive to a detected mismatch between the timecode stamp values in the first and second locations.
Type:
Grant
Filed:
August 23, 2016
Date of Patent:
May 15, 2018
Assignee:
Seagate Technology LLC
Inventors:
Jian Qiang, WenXiang Xie, Thein Than Zaw, Brian T. Edgar
Abstract: A circuit may be configured to adaptively combine two or more waveforms into a single waveform. The circuit can generate weighting factors based on received error signals, and can apply the weighting factors to the two or waveforms to be combined. In some examples, a circuit can be configured to receive input signals, receive error signals, generating a weighting coefficient based on at least some of the error signals, and determine an output signal based on the weighting coefficient and the input signals.
Type:
Grant
Filed:
October 30, 2015
Date of Patent:
May 15, 2018
Assignee:
Seagate Technology LLC
Inventors:
Ara Patapoutian, Rishi Ahuja, Jason Charles Jury, Raman C Venkataramani
Abstract: There is disclosed a controller (120) for controlling the speed of a cooling device (118) in an electronic apparatus (100), an apparatus (100), a storage enclosure (102) and a method of configuring an apparatus (100). The controller (120) is constructed and arranged to determine a speed value for the cooling device (118) in accordance with a temperature input received from a temperature sensor (122) associated with the apparatus, the speed value being selected from a set of N speed values. The controller is arranged to control the speed of the cooling device in accordance with the selected speed value. The step between at least one pair of adjacent speed values in the set is different from the step between another pair of adjacent speed values in the set.
Abstract: Methods, systems and computer-readable storage media for determining, by a storage controller, a read unit address and encoded length information of one of the plurality of read units of a non-volatile memory (NVM) based at least in part on a page address of a particular one of a plurality of pages in a storage space address. The encoded length information may be decoded. The storage controller may determine a span specifying an integer number of the read units and a length in units having a finer granularity than the read units based at least in part on the page address. The storage controller may read data associated with the particular page based at least in part on the read unit address and the span. The storage controller may update space usage information of the NVM based at least in part on the length.
Abstract: In certain embodiments, an apparatus may comprise a circuit configured to receive a plurality of samples of an input signal. The circuit may update one or more equalizer parameters using partial zero forcing equalization. Further, the circuit may generate an equalized signal based on the plurality of samples of the input signal and the one or more equalizer parameters.
Type:
Grant
Filed:
June 25, 2016
Date of Patent:
May 15, 2018
Assignee:
Seagate Technology LLC
Inventors:
William Michael Radich, Raman Venkataramani, Belkacem Derras, Rishi Ahuja
Abstract: A recording head includes a near-field transducer proximate a media-facing surface. The near-field transducer comprises an aperture portion surrounded by walls of plasmonic material, the walls oriented normal to the media-facing surface. A notch protrudes within the aperture. The notch comprises at least one of Rh and Ir. A write pole is proximate the near-field transducer. The write pole has a back surface facing away from the media-facing surface and an aperture-facing surface proximate the aperture.
Type:
Grant
Filed:
February 27, 2017
Date of Patent:
May 15, 2018
Assignee:
Seagate Technology LLC
Inventors:
Martin Giles Blaber, Michael Allen Seigler, Michael Christopher Kautzky
Abstract: Methods and media structures are provided for increasing writability and reducing unintentional erasure of perpendicular magnetic recording media. Variable permeability is controlled within a thin soft underlayer (SUL) structure, independent of bulk SUL material properties such as magnetic moment (Bs) and magnetic anisotropy (Hk). Media with an improved combination of easier writability on the recorded track and difficult erasure off-track (between tracks and on neighboring tracks) is achieved, in part, by an unbalanced antiferromagnetically coupled (AFC) SUL structure. A permeability gradient is established within the soft underlayer with layers having different values of permeability and magnetic thickness (Bs*t). In an aspect, a first SUL layer includes a high permeability region and an overlying low permeability region. A second layer antiferromagnetically couples the first layer to a low permeability third SUL layer.
Type:
Grant
Filed:
August 19, 2009
Date of Patent:
May 15, 2018
Assignee:
Seagate Technology LLC
Inventors:
Thomas P. Nolan, Bogdan F. Valcu, Li Tang
Abstract: A method is disclosed that includes forming at least one substrate alignment mark and at least one lithography alignment mark in a substrate; forming a seed layer on the substrate; and forming a guide pattern and at least one guide pattern alignment mark in the seed layer, where the at least one guide pattern alignment mark is formed over the at least one substrate alignment mark. The method further includes determining an alignment error of the at least one guide pattern alignment mark relative to the at least one substrate alignment mark; and patterning features on at least one region of the substrate, where the features are positioned on the substrate based on the at least one lithography alignment mark and the alignment error.
Type:
Grant
Filed:
October 10, 2016
Date of Patent:
May 8, 2018
Assignee:
Seagate Technology LLC
Inventors:
HongYing Wang, Kim Y. Lee, Yautzong Hsu, Nobuo Kurataka, Gennady Gauzner, Shuaigang Xiao
Abstract: Before writing to a heat-assisted magnetic recording medium, a DC signal modulated with an AC signal is applied to a laser of a read/write head. A modulation level of an optical power sensor is measured, the optical power sensor being coupled to detect optical output of the laser in response to the modulated current. A target value of the DC signal that causes the modulation levels to reach a predetermined value between zero and a maximum value is determined and used to set a bias current for subsequent activation of the laser based.
Type:
Grant
Filed:
August 8, 2017
Date of Patent:
May 8, 2018
Assignee:
Seagate Technology LLC
Inventors:
Tim Rausch, Edward Charles Gage, Joshua Ward Christensen, Todd Michael Lammers
Abstract: Devices having battery charge control circuits are disclosed. Such devices can include power control circuits operable to receive electrical power at a connector, and provide power to electrical components, including a charge current for a rechargeable battery; and a controller circuit configured to determine and store a maximum charge current setting based on whether a voltage at the connector falls below a predetermined limit as the charge current is increased. Corresponding methods are also disclosed.
Type:
Grant
Filed:
January 28, 2015
Date of Patent:
May 1, 2018
Assignee:
Seagate Technology LLC
Inventors:
Ashutosh Razdan, Philip Yin, Felix Markhovsky