Patents Assigned to Seagate Technologies
  • Patent number: 10303598
    Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory. The controller generally includes a processor, a cache and a hardware assist circuit. The processor may be configured to initiate a recycle operation by generation of a start index. The cache may be configured to buffer a first level of a map and less than all of a second level of the map. The hardware assist circuit may be configured to search through the first level or any portions of the second level of the map in the cache in response to the start index, and notify the processor in response to the search detecting one or more blocks in the memory that contain valid data to be recycled.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: May 28, 2019
    Assignee: Seagate Technology LLC
    Inventors: Timothy Canepa, Leonid Baryudin, Stephen D. Hanna, Alex G. Tang
  • Patent number: 10304482
    Abstract: Devices having an air bearing surface (ABS), the devices include a write pole; a near field transducer (NFT) including a peg and a disc, wherein the peg is at the ABS of the device; an overcoat, the overcoat including a low surface energy layer.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: May 28, 2019
    Assignee: Seagate Technology LLC
    Inventors: Yuhang Cheng, Michael Seigler, Scott Franzen, Tong Zhao, Xiaoyue Huang, Steven C. Riemer, Robert Anthony Fernandez, Douglas H. Cole
  • Patent number: 10297279
    Abstract: Methods of planarizing materials, such as where surface topographies are created as part of a thin film device fabrication process are described. These methods find particular application in the creation of nano-sized devices, where surface topographical features can be effectively planarized without adversely creating other surface topographies and/or causing deleterious effects a material junctions. Methods include the step of depositing a sacrificial layer overlying at least a portion of a first material layer and at least a portion of a backfilled second material at a junction between the first and second materials. The sacrificial layer substantially retains the surface topography of the microelectronic device. Chemical-mechanical planarization is performed on a surface of the sacrificial layer but leaving a remainder portion of the thickness of the sacrificial layer.
    Type: Grant
    Filed: April 10, 2018
    Date of Patent: May 21, 2019
    Assignee: Seagate Technology LLC
    Inventors: Zhiguo Ge, Shaun E. Mckinlay, Stacey C. Wakeham
  • Patent number: 10298240
    Abstract: In certain embodiments, an apparatus may comprise a circuit configured to scale a phase control value from an external phase control resolution of an external clock frequency to an internal phase control resolution of an internal clock frequency to generate a target phase control value. The circuit may also determine a difference between a current phase control value and the target phase control value and determine a phase step value based on the difference. Further, the circuit may modify a current phase control value based on the phase step value and generate a phase controlled clock signal at the internal clock frequency using the modified phase control value. Additionally, the circuit may divide the phase controlled clock signal at the internal clock frequency to generate a phase controlled clock signal at the external clock frequency.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: May 21, 2019
    Assignee: Seagate Technology LLC
    Inventors: Marcus Marrow, Kenneth John Evans, Jason Vincent Bellorado
  • Patent number: 10296239
    Abstract: Systems and methods are disclosed for object-based commands with quality of service identifiers. In an embodiment, an apparatus may comprise a memory device having a processor configured to store data as objects, each object including an object identifier field to track the object, and a user data field for user data of the object. The processor may be further configured to receive a command including an operation directed to an object, and a quality of service identifier that specifies a level of service associated with the operation. Commands may be directed toward put, get, and delete operations, among others.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: May 21, 2019
    Assignee: Seagate Technology LLC
    Inventors: Timothy R Feldman, James Prescott Hughes, Martin R Furuhjelm
  • Patent number: 10297282
    Abstract: A slider configured for heat-assisted magnetic recording comprises a magnetic writer, a near-field transducer, and an optical waveguide coupling the near-field transducer to a light source. The writer is situated proximate the near-field transducer at an air bearing surface of the slider and comprises a first return pole, a second return pole, and a write pole situated between and spaced apart from the first return pole and the second return pole. A structural element is situated at or near the air bearing surface between the write pole and one of the first and second return poles. The structural element comprises a cavity. A thermal sensor is disposed in the cavity. The thermal sensor is configured for sensing contact between the slider and a magnetic recording medium, asperities of the medium, and output optical power of the light source.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: May 21, 2019
    Assignee: Seagate Technology LLC
    Inventor: James Gary Wessel
  • Patent number: 10297281
    Abstract: Systems and methods are disclosed for detection of a servo sector on a data storage medium. A circuit may be configured to sample a signal, and determine preamble sample values from the sample values that correspond to a preamble pattern. When a preamble is detected, the circuit may continue to perform preamble detection, as well as determine signal reading parameters to apply during a servo timing mark (STM) search state based on the preamble sample values. In response to locating the STM, the circuit may generate an indication that the STM is located. In response to not locating the STM, the circuit may extend an STM search timeout period when the preamble pattern is still detected, or increment an STM search counter when the preamble pattern is not detected. The circuit may exit the STM search state when the STM search counter exceeds the STM search timeout period.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: May 21, 2019
    Assignee: Seagate Technology LLC
    Inventors: Jason Bellorado, Marcus Marrow
  • Patent number: 10297289
    Abstract: A loader assembly includes a base, a moveable lock, a lower lock, and an upper lock. The base has a top side, a bottom side, a leading edge, and a trailing edge. The moveable lock is configured to move with respect to the base, and the moveable lock includes a tip portion configured to engage a storage media carrier. The lower lock extends from the top side of the base near the leading edge. And, the upper lock extends from the top side near the trailing edge.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: May 21, 2019
    Assignee: Seagate Technology LLC
    Inventors: Nived Chandroth Korambeth, Kiran Devapalan, Shankar Gopalakrishna, Yogeesha Bidare Manjunathaiah
  • Patent number: 10290319
    Abstract: A method for performing a flaw scan test on a hard disk drive is disclosed. The hard disk drive includes a magnetic recording medium and spindle motor associated with a predetermined rated speed. The method includes writing a test pattern to the magnetic recording medium while operating the spindle motor at a speed greater than the predetermined rated speed. The method also includes reading the test pattern at the greater speed and detecting flaws in response to reading the test pattern.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: May 14, 2019
    Assignee: Seagate Technology LLC
    Inventors: Antonia Tsoukatos, Tim Rausch, Mehmet Fatih Erden, Benjamin W Parish, Prasanna Manja Ramakrishna, Morovat Bryan Tayefeh, Sai Sian Hon, ChengYi Guo, Teck Khoon Lim, Song Wee Teo
  • Patent number: 10290358
    Abstract: Read threshold voltage tracking techniques are provided for multiple dependent read threshold voltages using syndrome weights.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: May 14, 2019
    Assignee: Seagate Technology LLC
    Inventors: AbdelHakim S. Alhussien, Sundararajan Sankaranarayanan, Erich F. Haratsch
  • Patent number: 10288808
    Abstract: A waveguide includes multiple segments having different bend radii with substantially consistent cure profiles and related methods and systems for making and using the same. The waveguide is formed by modifying a laser beam used to write the waveguide to provide the consistent cure profile in the multiple segments. A marker characteristic of laser writing may be present in the waveguide. A method or system modifies an intensity profile or a shape profile of a laser beam to proactively compensate for exposure convolution based on the geometry of each waveguide segment. A convolution compensator is positioned in the path of the laser beam to modify the beam spot profile during writing to form the multiple segments of the waveguide in a photo-curable layer.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: May 14, 2019
    Assignee: Seagate Technology LLC
    Inventor: Richard C. A. Pitwon
  • Patent number: 10290314
    Abstract: The present disclosure involves a row bar that includes a plurality of slider bodies to be lapped. At least one slider body includes at least a first row of a plurality of electrical contact pads; and a second row of a plurality of electrical contact pads. The first row of electrical contact pads extends along the cross-track direction at a first position in a lapping direction. The second row of electrical contact pads extends along the cross-track direction at a second position in the lapping direction. The second row of electrical contact pads are electrically isolated from ground. The present disclosure also involves related methods of locating electrical contact pads on a slider body.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: May 14, 2019
    Assignee: Seagate Technology LLC
    Inventors: Jeff R. O'Konski, Andrew David Habermas, Andrew J. Sherve
  • Patent number: 10283151
    Abstract: An apparatus comprises a first electrical contact, a second electrical contact, and a semiconductor device disposed between the first and second electrical contacts. The semiconductor device comprises a laser diode and a temperature control unit. The laser diode comprises p-type semiconductor material and n-type semiconductor material. The temperature control unit comprises p-type semiconductor material, n-type semiconductor material, and a resistor coupled to the laser diode. One of the p-type semiconductor material and the n-type semiconductor material is shared by the laser diode and the temperature control unit.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: May 7, 2019
    Assignee: Seagate Technology LLC
    Inventors: James Gary Wessel, Scott Eugene Olson
  • Patent number: 10282103
    Abstract: Systems and methods are disclosed to delete a command queue, in accordance with certain embodiments of the present disclosure. An apparatus may comprise a circuit configured to receive a queue deletion indicator from a host device, including a queue identifier for a selected command queue to be deleted. The circuit may abort each command associated with the selected command queue and pending at the apparatus based on the queue identifier. Commands associated with the selected queue may be identified in a command table and flagged with an abort bit, which may signal an I/O processing pipeline to abort the command when encountered. The circuit may verify that no commands associated with the selected command queue remain pending at the apparatus, and send a completion indicator to notify the host device that the selected command queue is deleted.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: May 7, 2019
    Assignee: Seagate Technology LLC
    Inventors: Chris Randall Stone, Shashank Nemawarkar, Balakrishnan Sundararaman, Charles Edward Peet
  • Patent number: 10283152
    Abstract: A recording head includes a waveguide configured to deliver light from a light source to a media-facing surface of the recording head. A near-field transducer is at the media-facing surface the proximate the waveguide. The near-field transducer includes a plasmonic structure with at least two opposing internal surfaces. A dielectric material fills a region between the at least two opposing internal surfaces. A dielectric slit extends between the at least two opposing internal surfaces. The dielectric slit is substantially parallel to the media-facing surface and includes a transparent material with a refractive index different than that of the dielectric material.
    Type: Grant
    Filed: June 12, 2018
    Date of Patent: May 7, 2019
    Assignee: Seagate Technology LLC
    Inventors: Chubing Peng, James Gary Wessel, Lien Lee
  • Patent number: 10283173
    Abstract: Methods and apparatuses for intelligently managing backup capacitors in a storage device. The power consumption of the device is monitored in order to determine a current backup energy requirement comprising an amount of energy needed to power the device for data-backup and power-down operations in the event of an interruption of main power to the device. Based on the current backup energy requirement, one or more of a plurality of backup capacitors of the device are turned on or off, wherein the plurality of backup capacitors are configured such that those of the plurality of backup capacitors remaining in the on state provide backup energy to the device during the interruption of main power.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: May 7, 2019
    Assignee: Seagate Technologies LLC
    Inventors: Sathish Narayanan, Vinayak Vithalkar, Eric Pius Pradeep
  • Patent number: 10284231
    Abstract: Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, a solid-state non-volatile memory (NVM) has a total user data storage capacity and an overprovisioning (OP) level. A control circuit writes parity data sets to the NVM each having a plurality of code words and an outer code. The code words include inner codes at an inner code rate to detect and correct read errors in a user data payload. The outer code includes parity data at an outer code rate to detect and correct read errors in the code words. A code adjustment circuit increases the inner code rate to compensate for a measured parameter associated with the NVM, and decreases the outer code rate to maintain the data capacity and OP levels above selected thresholds.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: May 7, 2019
    Assignee: Seagate Technology, LLC
    Inventor: Timothy Canepa
  • Patent number: 10281268
    Abstract: A method includes receiving an image of a surface of a slider bar from an interferometer, where the slider bar includes at least two sliders, and where the image includes image data according to at least two image data channels for a slider bar surface and the at least two sliders. The method also includes generating a slider bar map of the surface of the slider bar based upon the image data of the image, where the slider bar map includes at least two data channels and ascertaining a plurality of individual slider surface maps based on a number of sliders included on the slider bar, where the ascertaining is also based upon the slider bar map having the at least two data channels. The method also includes segmenting the slider bar map according to the plurality of individual slider surface maps.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: May 7, 2019
    Assignee: Seagate Technology LLC
    Inventors: Zhiyu Chen, Andrew D. Habermas, Kurtis Dean Loken, Gary J. Kunkel
  • Publication number: 20190130966
    Abstract: Adaptive read reference voltage tracking techniques are provided that employ charge leakage mitigation. An exemplary device comprises a controller configured to: determine at least one reference voltage offset for a plurality of read reference voltages, wherein the at least one reference voltage offset is determined based on a shift in one or more of the read reference voltages over time; shift the plurality of read reference voltages using the at least one reference voltage offset; and employ the plurality of read reference voltages shifted by the at least one reference voltage offset to read data from the multi-level memory cells. The shifting step is optionally performed after a predefined time interval that approximates a settling time after a programming of the multi-level memory cells until a charge leakage of the multi-level memory cells has settled.
    Type: Application
    Filed: October 31, 2017
    Publication date: May 2, 2019
    Applicant: Seagate Technology LLC
    Inventors: Ludovic Danjean, Sundararajan Sankaranarayanan, Erich F. Haratsch
  • Publication number: 20190130967
    Abstract: Adaptive read reference voltage tracking techniques are provided that employ charge leakage mitigation. An exemplary device for use with multi-level memory cells, comprises a controller configured to: after a predefined time interval that approximates a settling time after a programming of the multi-level memory cells until a charge leakage of one or more of the multi-level memory cells has settled, determine a plurality of read reference voltages for the multi-level memory cells using a post-programming adaptive tracking algorithm; and employ the plurality of read reference voltages to read data from the multi-level memory cells. The reference voltage offsets are optionally determined based on a shift in the read reference voltages after the predefined time interval since the programming of the multi-level memory cells.
    Type: Application
    Filed: October 31, 2017
    Publication date: May 2, 2019
    Applicant: Seagate Technology LLC
    Inventors: Ludovic Danjean, Sundararajan Sankaranarayanan, Erich F. Haratsch