Abstract: Methods and media structures are provided for increasing writability and reducing unintentional erasure of perpendicular magnetic recording media. Variable permeability is controlled within a thin soft underlayer (SUL) structure, independent of bulk SUL material properties such as magnetic moment (Bs) and magnetic anisotropy (Hk). Media with an improved combination of easier writability on the recorded track and difficult erasure off-track (between tracks and on neighboring tracks) is achieved, in part, by an unbalanced antiferromagnetically coupled (AFC) SUL structure. A permeability gradient is established within the soft underlayer with layers having different values of permeability and magnetic thickness (Bs*t). In an aspect, a first SUL layer includes a high permeability region and an overlying low permeability region. A second layer antiferromagnetically couples the first layer to a low permeability third SUL layer.

Abstract: A method is disclosed that includes forming at least one substrate alignment mark and at least one lithography alignment mark in a substrate; forming a seed layer on the substrate; and forming a guide pattern and at least one guide pattern alignment mark in the seed layer, where the at least one guide pattern alignment mark is formed over the at least one substrate alignment mark. The method further includes determining an alignment error of the at least one guide pattern alignment mark relative to the at least one substrate alignment mark; and patterning features on at least one region of the substrate, where the features are positioned on the substrate based on the at least one lithography alignment mark and the alignment error.

Abstract: Systems and methods presented herein provide for computing read voltages for a storage device. In one embodiment, a controller is controller is operable to soft read data from a portion of the storage device, and to iteratively test the soft read data a predetermined number of times. For example, the controller may test the soft read data a number of times by applying a different probability weight to the soft read data each time the soft read data is tested. The controller may then decode the soft read data based on the probability weight, and determine an error metric of the decoded soft read data. Then, the controller determines a read voltage for the portion of the storage device based on the probability weight and the error metric.

Abstract: Before writing to a heat-assisted magnetic recording medium, a DC signal modulated with an AC signal is applied to a laser of a read/write head. A modulation level of an optical power sensor is measured, the optical power sensor being coupled to detect optical output of the laser in response to the modulated current. A target value of the DC signal that causes the modulation levels to reach a predetermined value between zero and a maximum value is determined and used to set a bias current for subsequent activation of the laser based.

Abstract: Devices having battery charge control circuits are disclosed. Such devices can include power control circuits operable to receive electrical power at a connector, and provide power to electrical components, including a charge current for a rechargeable battery; and a controller circuit configured to determine and store a maximum charge current setting based on whether a voltage at the connector falls below a predetermined limit as the charge current is increased. Corresponding methods are also disclosed.

Abstract: An apparatus comprises a slider having an air bearing surface (ABS) and a near-field transducer (NFT) at or near the ABS. An optical waveguide is configured to couple light from a laser source to the NFT. A resistive sensor comprises an ABS section situated at or proximate the ABS and a distal section extending away from the ABS to a location at least lateral of or behind the NFT. The resistive sensor is configured to detect changes in output optical power of the laser source and contact between the slider and a magnetic recording medium.

Abstract: A memory cartridge for use during assembly of a storage drive apparatus. The memory cartridge includes a first memory printed circuit board (PCB). The memory cartridge also includes a second memory PCB, where the second memory PCB is operatively coupled to the first memory PCB by a first flexible connection. The memory cartridge also includes a chassis configured to fasten to the first memory PCB and to the second memory PCB such that the first and second memory PCBs have a spaced relationship to each other, and where the spaced relationship defines a gap.

Abstract: A data storage device may employ a suspension that positions a transducing head proximal a data storage medium. The suspension can consist of an active fiber composite that spans a portion of a loadbeam. The active fiber composite can be configured with at least one active fiber contacting a supporting layer.

Abstract: Provided herein is an apparatus, including a photon emitter configured to emit photons onto a surface of an article at a number of azimuthal angles; and a processing element configured to process photon-detector-array signals corresponding to photons scattered from surface features of the article and generate one or more surface features maps for the article from the photon-detector-array signals corresponding to the photons scattered from the surface features of the article.

Abstract: In certain embodiments, an apparatus may comprise a circuit configured to scale a phase control value from an external phase control resolution of an external clock frequency to an internal phase control resolution of an internal clock frequency to generate a target phase control value. The circuit may also determine a difference between a current phase control value and the target phase control value and determine a phase step value based on the difference. Further, the circuit may modify a current phase control value based on the phase step value and generate a phase controlled clock signal at the internal clock frequency using the modified phase control value. Additionally, the circuit may divide the phase controlled clock signal at the internal clock frequency to generate a phase controlled clock signal at the external clock frequency.

Abstract: A method for assembling a head-gimbal assembly of a hard disk drive, the method including the steps of dispensing adhesive onto a top surface of a gimbal tongue, wherein the gimbal tongue is positioned adjacent to a load beam with a dimple extending from its top surface, and wherein the gimbal tongue is configured with at least one support feature that inhibits its deformation toward the dimple when subjected to downward pressure with respect to the dimple; positioning a slider on which a magnetic head is mounted adjacent to the top surface of the gimbal tongue; and pressing the slider onto the adhesive and toward the dimple of the load beam.

Abstract: A slider for use in a disk drive, the slider including a slider body having a leading surface and an opposite trailing surface, wherein the trailing surface includes portions with extensions or depressions. The extensions or depressions include a slider bond pad.

Abstract: A storage device sled for mounting a storage device within a chassis is provided. The storage device sled includes a bezel, which includes a first portion that is stationary relative to a storage device, a second portion vertically captured within the first portion and configured to slide between unlatching and latching positions, and a spring configured to push the latch outwardly from the bezel. The second portion includes a finger-movable member, a latch, and a horizontal biasing feature adjacent to the latch and configured to move in concert with the latch. The storage device sled also includes first and second longitudinal members, each orthogonally coupled to opposite ends of the bezel first portion and each coupled to opposite sides of the storage device. When the storage device is installed in the chassis, the horizontal biasing feature exerts force against a first chassis interior side surface and biases the storage device sled against a second chassis interior side surface.

Abstract: A data storage area of a data storage device can be used to communicate information between the data storage device and an external device or software. In some examples, configuration data stored within the data storage area can be used to determine a subset of data to copy or move from a first data storage medium to a second data storage medium. The data storage area can be a unique partition and the data storage device can locate partition information to determine a location of the partition. The data storage device can then use the partition to store data for two-way communication between the data storage device and an external system, device, or software.

Abstract: A system may include an interpolator circuit configured to receive a first signal with a first rate and to generate an interpolated signal with a second rate. The system may include a cancellation circuit configured to determine an interference component signal based on the interpolated signal. The system may further comprise an adder configured to receive a second signal with the second rate and to cancel interference in the second signal using the interference component signal to generate a cleaned signal.

Abstract: Mapping table entries that map logical block addresses to physical block addresses can be intercepted and compressed to save space. In some cases, the mapping table entries can be compressed into compression units, which can hold multiple mapping table entries. Portions of the mapping table entries can be arranged into groups, and a group can be compressed with a unique compression method. The compression method used to compress a group may be based on data characteristics of the group. When data corresponding to the mapping table entries are read or modified, the compressed data can be decompressed and provided to a requesting controller or processor. When the mapping table entry is modified, the updated mapping entry may be arranged into groups, and the groups can be compressed and stored to the compression units.

Abstract: Method and apparatus for managing data in a stacked semiconductor memory, such as but not limited to a three dimensional (3D) NAND flash memory array. In some embodiments, a data set is written to the memory array by programming a stack of memory cells to a desired set of program states. A first set of pulses is applied to verify the memory cells conform to the desired set of program states. The verified stack of memory cells are subsequently conditioned by applying a second set of pulses to remove accumulated charge from a shared channel region of the stack. The conditioning of the memory cells reduces a step-wise increase in the number of read errors during the first read operation as compared to subsequent read operations on the memory cells.

Abstract: In some embodiments, a thermally assisted data recording medium has a recording layer formed of iron (Fe), platinum (Pt) and a transition metal T selected from a group consisting of Rhodium (Rh), Ruthenium (Ru), Osmium (Os) and Iridium (Ir) to substitute for a portion of the Pt content as FeYPtY-XTX with Y in the range of from about 20 at % to about 80 at % and X in the range of from about 0 at % to about 20 at %.

Abstract: Apparatus and method for controlling the position of a control object using a multi-stage actuator. A multi-stage actuator is provided with first and second actuation stages adapted to position a control object. A control circuit includes a multi-tap lattice structure and parallel first and second multiple regression filters coupled to respective taps of the multi-tap lattice structure. The control circuit concurrently generates and applies first and second disturbance rejection signals to the respective first and second actuation stages to compensate a disturbance signal component in a position error signal (PES) indicative of position error of the control object.

Abstract: Presented is a data channel with selectable components, such as encoders or decoders. Also, data having different data signal characteristics can be processed through a data channel based on the data signal characteristics. Further, a data channel may have independent encoding path and an independent decoding path. For example, a first data transmission having first data signal characteristics may be processed via a data channel based on a first selected set of components of the data channel and a second data transmission having second data signal characteristics different than the first data signal characteristics may be processed via the data channel using a second selected set of components in the data channel. The first selected set of components may be different than the second selected set of components, but may share one or more common components.