Patents Assigned to Seagate Technology LLC
  • Patent number: 11929104
    Abstract: A recording head has a magnetic write transducer having a first crosstrack width operable to write a single track of data at a time to a magnetic disk. The recording head also has a magnetic erase transducer separate from the magnetic write transducer. The magnetic erase transducer has a second crosstrack width operable to simultaneously erase multiple tracks of data from the magnetic disk.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: March 12, 2024
    Assignee: Seagate Technology LLC
    Inventors: Lihong Zhang, Xiong Liu
  • Patent number: 11925739
    Abstract: An implantable or wearable kidney enclosure that is cylindrical, ovoid, or otherwise non-angular e.g., not rectangular or cuboid), having a circular or oval hemofilter that provides a blood flow pattern from an internal, central artery source radially outwards. Due to the efficient flow of the circular filter design, the enclosure can be made in a cylindrical low profile shape, resulting in a compact enclosure highly suitable for implantable and wearable dialysis applications.
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: March 12, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventor: Thomas Y. Chang
  • Patent number: 11929761
    Abstract: Systems and methods are disclosed for implementing a low latency decoder. In certain embodiments, an apparatus may comprise decoder configured decode a codeword of bits, including: a variable node processor configured to provide a plurality of variable-to-check (v2c) message vectors to the edge combiner in parallel, the plurality of v2c message vectors including estimates for a selected set of bits of the codeword; the edge combiner configured to generate a plurality of output message vectors for a plurality of check node vectors based on the plurality of v2c message vectors, and provide the plurality of output message vectors to the plurality of check node vectors simultaneously; a check node processor configured to update the plurality of check node vectors based on the plurality of output message vectors; and a convergence checker circuit configured to detect a valid code word based on bit value estimates from the variable node processor.
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: March 12, 2024
    Assignee: Seagate Technology LLC
    Inventor: Bengt Anders Ulriksson
  • Publication number: 20240077474
    Abstract: The present disclosure describes a system and methods for positioning a configured number of biomaterials on a surface. The method disclosed includes the formation of a membrane mask structure including a configured number of nanopores. The nanopores are generally sized to be the same size as, or slightly larger than a single target biomaterial. The masking membrane is then adhered to a substrate. The substrate may include a raw substrate, or may be functionalized for the purpose of binding biomaterials with greater attraction. A solution including the target biomaterials is then exposed to the masking membrane. One biomaterial is able to adhere to the substrate through each nanopore. The solution is rinsed from the membrane surface leaving only the biomaterial that has adhered to the substrate with a relatively strong binding force. The masking membrane may then either remain or may be removed.
    Type: Application
    Filed: September 6, 2022
    Publication date: March 7, 2024
    Applicant: Seagate Technology LLC
    Inventors: James Froberg, Gemma Mendonsa, Calvin Daniel Nazareth
  • Patent number: 11923026
    Abstract: A data storage system may connect a non-volatile memory to a quarantine module that generates a quarantine strategy in response to a pending data access request to the non-volatile memory. The quarantine strategy can proactively prescribing a plurality of status levels for physical data addresses of the non-volatile memory. A comparison of a volume of errors for the non-volatile memory to a first threshold of the quarantine strategy with the quarantine module may prompt the alteration of a first status level of the plurality of status levels for a first physical data address of the non-volatile memory, as directed by the quarantine strategy.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: March 5, 2024
    Assignee: Seagate Technology LLC
    Inventors: Jeremy B. Goolsby, Ryan J. Goss, Indrajit Prakash Zagade, Thomas V. Spencer, Jeffrey J. Pream, Christopher A. Smith, Charles McJilton
  • Patent number: 11924173
    Abstract: An edge node has a central processing operable to gather sensor node data via a sensor and store at least part of the sensor node data locally in a public region of a persistent storage. The edge node backs up duplicate portions of the sensor node data to public storage regions of peer-edge nodes. The edge node receives private data from a host that is coupled to the edge computing node and the peer edge nodes, and stores the private data in a private region of the persistent storage. The private region is protected from the peer edge nodes using distributed key management.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: March 5, 2024
    Assignee: Seagate Technology LLC
    Inventors: Mehmet Fatih Erden, Walter R. Eppler, Robert D. Murphy, Greg D. Larrew
  • Patent number: 11922024
    Abstract: The technology disclosed herein pertains to a method for determining expected command completion time (CCT), the method including receiving a plurality of position error signals (PESs) for an HDD over a predetermined time period, determining sigma of the plurality of PESs, retrieving upper off-track limits (UOL) for one or more data sectors of the HDD, calculating average number of retrieved sectors (A) between two consecutive occurrences of the |PES|>UOL for the HDD, and determining required number of revolutions (CCT) to collect data based on the average number of retrieved data sectors (A) and a total number of requested data sectors (N).
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: March 5, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Xiong Liu, Wenxiang Xie
  • Patent number: 11922055
    Abstract: Apparatus and method for managing data in a processing system, such as but not limited to a data storage device such as a solid-state drive (SSD). A ferroelectric stack register memory has a first arrangement of ferroelectric memory cells (FMEs) of a first construction and a second arrangement of FMEs of a different, second construction arranged to provide respective cache lines for use by a controller, such as a programmable processor. A pointer mechanism is configured to provide pointers to point to each of the respective cache lines based on a time sequence of operation of the processor. Data sets can be migrated to the different arrangements by the controller as required based on the different operational characteristics of the respective FME constructions. The FMEs may be non-volatile and read-destructive. Refresh circuitry can be selectively enacted under different operational modes.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: March 5, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
  • Patent number: 11913130
    Abstract: A data storage device comprising a recording head having a high damping magnetic alloy layer including at least one magnetic alloy element, and a 5d transition element; the high damping magnetic alloy layer having a mixed face-centered cubic (fcc) and body-centered cubic (bcc) crystal structure, and the mixed fcc and bcc crystal structure comprising fcc and bcc grains, with the bcc grains having an elongated shape relative to the fcc grains, a larger size than the fcc grains, and slip deformation, thereby providing the high damping magnetic alloy layer with a damping constant of up to about 0.07.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: February 27, 2024
    Assignee: Seagate Technology LLC
    Inventors: Jie Gong, Steven C. Riemer, John A. Rice, Hilton Erskine, Michael C. Kautzky, Xuelian Xu
  • Patent number: 11917062
    Abstract: Key rotation verification without decryption is provided. Two ciphertext inputs encrypted from a plaintext input by an encryption function using different cryptographic keys are input, wherein the encryption function is selected from a function family having an output space of one or more convex sets. A divergence between the two ciphertext inputs is computed. A membership oracle is executed on the two ciphertext inputs, wherein the two ciphertext inputs are determined to be members of the same convex set of the one or more convex sets if the computed divergence satisfies a separation condition. The two ciphertext inputs are validated to both correspond to the same plaintext input, responsive to determining that the two ciphertext inputs are members of the same convex set, wherein the two ciphertext inputs do not correspond to the same plaintext input if the two ciphertext inputs are not members of the same convex set.
    Type: Grant
    Filed: May 25, 2022
    Date of Patent: February 27, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Vipin Singh Sehrawat, Josip Relota
  • Patent number: 11908504
    Abstract: A memory device formed of ferroelectric field effect transistors (FeFETs). The memory device can be used as a front end buffer, such as in a data storage device having a non-volatile memory (NVM). A controller can be configured to transfer user data between the NVM and an external client (host) via the buffer. The FeFETs can be arranged in a two-dimensional (2D) or a three-dimensional (3D) array. A monitor circuit can be used to monitor operation of the FeFETs. An optimization controller can be used to adjust at least one operational parameter associated with the FeFETs responsive to the monitored operation by the monitor circuit. The FeFETs may require a refresh operation after each read operation. A power down sequence can involve a read operation without a subsequent refresh operation to wipe the FeFETs, the read operation jettisoning the data read from the buffer memory.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: February 20, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
  • Patent number: 11908502
    Abstract: A method for reducing noise in a read signal due attributable to read element asymmetry provides for transmitting a write signal through a write precompensation circuit that shifts rising edges and falling edges of each of pulse in the write signal by a select magnitude and in opposite directions. After the write signal is encoded on a media, a corresponding read signal is read, with a read element, from the media. The method further provides for transmitting the read signal through a magnetoresistive asymmetry compensation (MRAC) block that is tuned to correct second-order non-linearities characterized by a particular set of distortion signatures. The select magnitude of the waveform shift applied by the write precompensation circuit introduces a non-linear signal characteristic that combines with non-linear signal characteristics introduced by the read element to generate one of the particular distortion signatures that is correctable by the MRAC block.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: February 20, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Walter R. Eppler, Drew Michael Mader
  • Patent number: 11907392
    Abstract: A function is decomposed into a plurality of function shares. The function returns a Boolean result based on whether an input y satisfies a query on a data set. The function shares hide the function from non-collaborating entities that separately execute the function shares. Each of the functions shares are sent to one of a plurality of servers having a same data set. The function shares are executed on the data set at the servers to obtain a respective plurality of shares. A conditional disclosure of secrets operation is simulated on the shares and the input y. The conditional disclosure of secrets operation uses a secret known to at least one of the servers, and further uses a source of randomness shared between the servers. A Boolean value corresponding to the Boolean result is returned based on the conditional disclosure of secrets operation returning the secret.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: February 20, 2024
    Assignee: Seagate Technology LLC
    Inventors: Nolan Miranda, Vipin Singh Sehrawat, Foo Yee Yeo
  • Patent number: 11901013
    Abstract: Method and apparatus for managing data in a non-volatile memory (NVM) of a storage device, such as a solid-state drive (SSD). Data are stored to and retrieved from a group of memory cells in the NVM using a controller circuit. The data are retrieved using a first set of read voltages which are applied to the respective memory cells. The first set of read voltages are accumulated into a history distribution, which is evaluated to arrive at a second set of read voltages based upon characteristics of the history distribution. A calibration operation is performed on the memory cells using the second set of read voltages as a starting point. A final, third set of read voltages is obtained during the calibration operation to provide error rate performance at an acceptable level. The third set of read voltages are thereafter used for subsequent read operations.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: February 13, 2024
    Assignee: Seagate Technology LLC
    Inventors: Stacey Secatch, Jonathan Henze
  • Patent number: 11899952
    Abstract: A system can log data access activity to a memory array with a metadata module while the memory array is logically divided into multiple namespaces. A workload can be determined for each namespace by the metadata module and a metadata strategy can be created with the metadata module in view of the respective namespace workloads. A first metadata and second metadata may be generated for respective first and second user-generated data for storage into a first namespace of the multiple namespaces. The first metadata can be compressed with a compression level prescribed by the metadata strategy in response to a detected or predicted workload to the first namespace before the first metadata, second metadata, first user-generated data, and second user-generated data are each stored in the first namespace.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: February 13, 2024
    Assignee: Seagate Technology LLC
    Inventors: Ryan James Goss, David W. Claude, Daniel J. Benjamin, Thomas V. Spencer, Matthew B. Lovell
  • Patent number: 11900970
    Abstract: Systems and methods are disclosed for magnetoresistive asymmetry compensation using a hybrid analog and digital compensation scheme. In certain embodiments, a method may comprise receiving an analog signal at a continuous-time front end (CTFE) circuit, and performing, via the CTFE circuit, first magnetoresistive asymmetry (MRA) compensation on the analog signal to adjust the dynamic range of the analog signal based on an input range of an analog-to-digital converter (ADC). The method may further comprise converting the analog signal to a digital sample sequence via the ADC, and performing, via a digital MRA compensation circuit, second MRA compensation to correct residual MRA in the digital sample sequence. Offset compensation may also be performed in both the analog and digital domains.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: February 13, 2024
    Assignee: Seagate Technology LLC
    Inventors: Jason Bellorado, Marcus Marrow, Zheng Wu
  • Patent number: 11900963
    Abstract: A heat-assisted magnetic recording head comprises a near-field transducer (NFT). The NFT comprises a near-field emitter configured to heat a surface of a magnetic disk, and a hybrid plasmonic disk. The hybrid plasmonic disk comprises a plasmonic region and a thermal region. The plasmonic region comprises a first material or alloy that is a plasmonic material or alloy. The thermal region comprises a second material or alloy that is different than the first material or alloy.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: February 13, 2024
    Assignee: Seagate Technology LLC
    Inventors: Yuhang Cheng, Tae-Woo Lee, Michael A Seigler, Yang Wu
  • Patent number: 11900965
    Abstract: A data storage device includes a disc, an actuator arm assembly, a servo clock, and a feedback and control system. The disc includes a top and bottom surfaces and a servo wedge. The servo wedge includes a top surface boundary and a bottom surface boundary. The actuator arm assembly supports a head pair configured for interaction with the top and bottom surfaces. The servo clock is configured to determine a top time at which the head pair encounters the top surface boundary and a bottom time at which the head pair encounters the bottom surface boundary during a disc read/write interaction. The feedback and control system is configured to determine an operation time difference; compare the operation time difference to a certification time difference correlating to a target vertical position of the actuator arm assembly relative to the disc; and move the actuator arm assembly to the target vertical position.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: February 13, 2024
    Assignee: Seagate Technology LLC
    Inventors: Xiong Liu, Choon Kiat Lim, June Christian Ang, Yichao Ma
  • Patent number: 11899590
    Abstract: A data storage system can employ a read destructive memory configured to fill a first cache with a first data set from a data repository prior to populating a second cache with a second data set describing the first data set with the first and second cache each having non-volatile ferroelectric memory cells. An entirety of the first cache may be read in response to a cache hit in the second cache with the cache hit responsive to a data read command from a host and with the first cache being read without a refresh operation restoring the data of the first cache.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: February 13, 2024
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Jon D. Trantham, Praveen Viraraghavan, John W. Dykes, Ian J. Gilbert, Sangita Shreedharan Kalarickal, Matthew J. Totin, Mohamad El-Batal, Darshana H. Mehta
  • Patent number: 11893268
    Abstract: A method includes calculating, by a data storage device processor, at least one access trajectory from a first disc surface location to at least one second disc surface location at which at least one primary data access operation is to be carried out. The method also includes determining, by the data storage device controller, whether an opportunity to commence at least one secondary data access operation exists along or proximate to the at least one access trajectory from the first disc surface location to the at least one second disc surface location.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: February 6, 2024
    Assignee: Seagate Technology LLC
    Inventors: Brian T. Edgar, Mark A. Gaertner