Abstract: An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

Abstract: An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications capable of flexibly processing high-bandwidth and low-bandwidth RF input signal(s). The RF transceiver may selectively distribute high-bandwidth RF input signals among one or more DSP pipelines for parallel processing of the RF input signals, and the RF transceiver may coherently recombine the processed signals from the one or more DSP pipelines to generate an RF output signal. The ADDA RF transceiver includes one or more ADCs, DSPs, and DACs, all on one or more ASICs, FPGAs, or modular electronic devices in a single semiconductor package. Further, the RF transceiver is radiation tolerant at the module, circuit, and/or system level for high availability and reliability in the ionizing radiation environment present in the space environment.

Abstract: An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications capable of flexibly processing high-bandwidth and low-bandwidth RF input signal(s). The RF transceiver may selectively distribute high-bandwidth RF input signals among one or more DSP pipelines for parallel processing of the RF input signals, and the RF transceiver may coherently recombine the processed signals from the one or more DSP pipelines to generate an RF output signal. The ADDA RF transceiver includes one or more ADCs, DSPs, and DACs, all on one or more ASICs, FPGAs, or modular electronic devices in a single semiconductor package. Further, the RF transceiver is radiation tolerant at the module, circuit, and/or system level for high availability and reliability in the ionizing radiation environment present in the space environment.

Abstract: A satellite communication system processes a plurality of input signals to generate beamformed signals, drives a plurality of nonlinear power amplifiers with the beamformed input signals to produce RF signals for transmission; and transmits the RF signals with a plurality of Tx antenna elements. Conversion to and from linear signals to and from nonlinear or digitized signals is performed. Temporal or spatial decorrelation of the beamformed signals is employed to reduce the impact of intermodulation products. In some cases the power amplifiers are nonlinear, and can be one-sided or two-sided and produce two or three distinct output levels.

Abstract: An electronic device for a communications satellite for beamforming, channelization, and/or routing is implemented using a digital folded architecture to reduce the number of serial communication paths and provide more flexible routing and network configurability and scalability. A method for configuring the switching network of a system comprising multiple electronic devices allows the system to be dynamically reconfigured to implement different types of networks.

Abstract: Systems and methods for synchronizing the clocks of a central device and one or more destination devices are disclosed. In some embodiments the central device and destination devices are implemented in a space-based or high-altitude asset. The central device provides a series of synchronization pulses to the one or more destination devices. In response to detecting, at the destination device, the synchronization pulse, a sample of the destination device clock is stored in a register. The sample is provided to the central device. The sequence is repeated at least once. A phase offset between the central device clock and the destination device clock may be determined based on the returned samples and the position of the samples within the register.

Abstract: An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

Abstract: An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuity is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

Abstract: An electronic device for a communications satellite for beamforming, channelization, and/or routing is implemented using a digital folded architecture to reduce the number of serial communication paths and provide more flexible routing and network configurability and scalability. A method for configuring the switching network of a system comprising multiple electronic devices allows the system to be dynamically reconfigured to implement different types of networks.

Abstract: A hybrid system of satellite-based beamforming that includes digitally beamforming in one axis and physically beamforming in an orthogonal axis. Based on the orientation of the satellite, the digital beamforming axis may be the in-track axis, the cross-track axis, or anywhere in between those two axes. In the digitally beamformed axis, the beam pattern can be steered to different positions along the axis and it can be compressed or expanded, as desired.

Abstract: Light-weight, configurable error detection in a satellite communication system that detects invalid SerDes lanes via hash codes appended to packets of data in the lanes. An indication can be passed back upstream about the invalid lane so that the lane can be reset. Error correction can be provided by reconstructing the bit data in the invalid SerDes lane based on parity information in an optional parity lane.

Abstract: Methods, systems, and devices for configuration and upset recovery of reconfigurable devices are provided. A central program/recovery manager (CPRM) is coupled with each of a number of reconfigurable devices. The reconfigurable devices are programmed/configured by the CPRM, which then periodically monitors each of the reconfigurable devices to detect if one or more of the devices has experienced an upset. In the event of an upset, the CPRM may attempt to reset the reconfigurable device, scrub a memory of the reconfigurable device, or reprogram the reconfigurable device. A memory module is coupled with the CPRM and each of the reconfigurable devices that stores bit or programming files that may be used to program and/or reprogram the reconfigurable devices.

Abstract: A system for dissipating thermal energy from an enclosure includes a gusset having a base engagement face and an enclosure engagement face that may be removably coupled with the enclosure. In some embodiments, a heat pipe extends along a gusset frame between portions of the base engagement face and the enclosure engagement face. The heat pipe is angularly shaped in various embodiments and is thermally coupled with the base engagement face and the enclosure engagement face. In some embodiments, the heat pipe is coupled within a heat pipe channel that extends along a length of the gusset.

Abstract: An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

Abstract: Methods, systems, and devices for configuration and upset recovery of reconfigurable devices are provided. A central program/recovery manager (CPRM) is coupled with each of a number of reconfigurable devices. The reconfigurable devices are programmed/configured by the CPRM, which then periodically monitors each of the reconfigurable devices to detect if one or more of the devices has experiences an upset. In the event of an upset, the CPRM may attempt to reset the reconfigurable device, scrub a memory of the reconfigurable device, or reprogram the reconfigurable device. A memory module is coupled with the CPRM and each of the reconfigurable devices that stores bit or programming files that may be used to program and/or reprogram the reconfigurable devices.

Abstract: Methods, systems, and devices for distributed computing are provided. Clusters of nodes are provided, each node have a communication link to a primary I/O switch as well as to two other nodes, thereby providing redundant alternative communication paths between different components of the system. Primary and redundant I/O switching modules may provide further redundancy for high availability and high reliability applications, such as applications that may be subjected to the environment as would be found in space, including radiation effects. Nodes in a cluster may provide data storage, processing, and/or input/output functions, as well as one or more alternate communications paths between system components. Multiple clusters of nodes may be coupled together to provide enhanced performance and/or reliability.

Abstract: Error correction and detection may be performed across multiple dimensions of memory storage, such as across two or more complete memory devices, as well as within individual pages of memory within a single memory device. Error correction and detection performed across two or more complete memory devices may mitigate single event functional interrupts that affect a complete memory device. Error detection and correction performed within individual pages of memory may be used to mitigate single event upset induced single and multiple bit flips within a page of a memory device. A parallel or serial block code, such as a parallel or serial block Reed-Solomon code or any other type of error correcting code, may be used for error correction and detection performed across two or more complete memory devices or within individual pages of memory within a single memory device.

Abstract: Methods, systems, and devices for distributed computing are provided. Clusters of nodes are provided, each node have a communication link to a primary I/O switch as well as to two other nodes, thereby providing redundant alternative communication paths between different components of the system. Primary and redundant I/O switching modules may provide further redundancy for high availability and high reliability applications, such as applications that may be subjected to the environment as would be found in space, including radiation effects. Nodes in a cluster may provide data storage, processing, and/or input/output functions, as well as one or more alternate communications paths between system components. Multiple clusters of nodes may be coupled together to provide enhanced performance and/or reliability.