Abstract: Methods and digital circuits provide frequency correction to frequency synthesizers. Dual switched-capacitor voltage detectors connected to an input signal periodically sample the voltage of the input signal, and then determine a fundamental frequency of the input signal from the output of the dual switched-capacitor voltage detectors. The sample period of the dual switched-capacitor voltage detectors is proportional to a time period between a previous pair of voltage peaks detected in the input signal, thereby eliminating harmonic components in the original signal which might otherwise cause errors in frequency estimation without causing unwanted sluggishness in the transient response of the frequency detection process. The time period between the previous pair of detected voltage peaks is used to create a decay signal that initiates a capacitor decay time for each voltage detector.

Abstract: Methods and digital circuits provide frequency correction to frequency synthesizers. Dual switched-capacitor voltage detectors connected to an input signal periodically sample the voltage of the input signal, and then determine a fundamental frequency of the input signal from the output of the dual switched-capacitor voltage detectors. The sample period of the dual switched-capacitor voltage detectors is proportional to a time period between a previous pair of voltage peaks detected in the input signal, thereby eliminating harmonic components in the original signal which might otherwise cause errors in frequency estimation without causing unwanted sluggishness in the transient response of the frequency detection process. The time period between the previous pair of detected voltage peaks is used to create a decay signal that initiates a capacitor decay time for each voltage detector.

Abstract: Methods and digital circuits providing frequency correction to frequency synthesizers are disclosed. Dual switched-capacitor peak detectors connected to an input signal periodically sample the voltage of the input signal, and then determine a fundamental frequency of the input signal from the output of the dual switched-capacitor peak detectors. Both the sample period and the decay time of the dual switched-capacitor peak detectors are proportional to a time period between a previous pair of voltage peaks detected in the input signal. This makes the peak detectors immune to lower-amplitude oscillations which are often present within a single fundamental cycle in musical signals with strong harmonic components which might otherwise cause errors in frequency estimation. This is done without causing unwanted sluggishness in the transient response of the frequency detection process.

Abstract: Methods and systems including music synthesizers for synchronous sampling of analog signals are disclosed. A music synthesizer can include an adaptive low-pass filter, a synchronous sample clock generator, a digital signal processor, an analog-to-digital converter, and a digital-to-analog converter. The synchronous sample clock generator creates a synchronous sample clock signal using a filtered audio signal, as well as an “up” pulse and a “down” pulse, all of which are utilized by the digital signal processor to perform operations on the audio signal. The digital signal processor generates a clean sample clock for resampling the original audio signal to the synchronous sample clock rate.

Abstract: Methods and digital circuits providing frequency correction to frequency synthesizers are disclosed. An FLL digital circuit is provided that is configured to handle a reference frequency that is dynamic and ranges over a multi-decade range of frequencies. The FLL circuit includes a digital frequency iteration engine that allows for detection of disappearance of a reference frequency. When the digital frequency iteration engine detects that the reference frequency signal is not available, the oscillator generated frequency is not corrected, and the last value of the oscillator generated frequency is held until the reference frequency signal becomes available again. This FLL circuit is also preceded by a low-pass filter which is dynamically tuned to the frequency to which the FLL locks, eliminating harmonic components in the original signal which might otherwise cause errors in frequency estimation.

Abstract: Methods and digital circuits providing frequency correction to frequency synthesizers are disclosed. An FLL digital circuit is provided that is configured to handle a reference frequency that is dynamic and ranges over a multi-decade range of frequencies. The FLL circuit includes a digital frequency iteration engine that allows for detection of disappearance of a reference frequency. When the digital frequency iteration engine detects that the reference frequency signal is not available, the oscillator generated frequency is not corrected, and the last value of the oscillator generated frequency is held until the reference frequency signal becomes available again.