Patents Assigned to Seiko Instruments Inc.
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Patent number: 9000726Abstract: Provided are a cell balance device for protecting a switch circuit from an overcurrent flow. The cell balance device includes: a plurality of electric accumulator connection terminals each connected to one of a node and two terminals of electric accumulators connected in series; a voltage hold device connection terminal connected to a voltage hold device; a plurality of first switch circuits provided between the plurality of electric accumulator connection terminals and the voltage hold device; a control circuit for controlling ON/OFF of the plurality of first switch circuits based on a synchronization signal; and an overcurrent detection circuit for detecting an overcurrent flowing through each of the plurality of first switch circuits.Type: GrantFiled: August 10, 2012Date of Patent: April 7, 2015Assignee: Seiko Instruments Inc.Inventors: Atsushi Sakurai, Hiroshi Saito
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Patent number: 9000749Abstract: Provided is a constant current circuit in which an enhancement N-channel transistor can operate in a weak-inversion state even at high temperatures. A constant current circuit includes a current mirror circuit, a constant-current generation block circuit, and an off-leak circuit, wherein the off-leak circuit is constituted by a first enhancement N-channel transistor having a gate and a source connected to an earth terminal and a drain connected to an output of the constant current circuit. This suppresses an increase in a gate-to-source voltage of the enhancement N-channel transistor which generates a constant current, thereby maintaining its operation in a weak-inversion state.Type: GrantFiled: October 25, 2012Date of Patent: April 7, 2015Assignee: Seiko Instruments Inc.Inventor: Yuji Kobayashi
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Patent number: 8994160Abstract: A resin-encapsulated semiconductor device includes: a semiconductor element mounted on a die pad portion; a plurality of lead portions disposed so that distal end parts thereof are opposed to the die pad portion; a metal thin wire for connecting an electrode of the semiconductor element to the lead portion; and an encapsulating resin for partially encapsulating those components. A bottom surface part of the die pad portion, and a bottom surface part, an outer surface part, and an upper end part of the lead portion are exposed from the encapsulating resin. A plated layer is formed on the exposed lead bottom surface part and the exposed lead upper end part.Type: GrantFiled: September 18, 2013Date of Patent: March 31, 2015Assignee: Seiko Instruments Inc.Inventor: Noriyuki Kimura
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Patent number: 8988840Abstract: Provided is an overcharge prevention circuit for clamping a voltage value of an electric power generation unit in an overcharged state to a constant value, in which the number of elements is small and which does not consume electric power unnecessarily. The overcharge prevention circuit includes: a backflow prevention diode; a clamping transistor having a gate connected to a cathode of the backflow prevention diode, a source connected to an anode thereof, and a drain connected to an overcharge prevention switch. Upon detection of overcharge, a current is discharged via the clamping transistor and the overcharge prevention switch, thereby clamping a potential of the electric power generation unit to around a voltage of an electricity storage unit.Type: GrantFiled: September 12, 2012Date of Patent: March 24, 2015Assignee: Seiko Instruments Inc.Inventors: Makoto Mitani, Kotaro Watanabe
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Patent number: 8978217Abstract: A package manufacturing method where a base substrate and a lid substrate, at least one having a through-hole, are anodically bonded to each other using a jig having a communication-hole and arranged in a vacuum chamber to laminate the lid substrate to the base substrate and thereby form a bonded body having a plurality of cavities, each of which includes an electronic part sealed therein. The through-hole and the communication-hole are aligned with each other inside the vacuum chamber, such that gas within the cavities can escape through the through-hole and the communication-hole during bonding. A plurality of packages are formed by cutting the bonded body for every one of the plurality of cavities.Type: GrantFiled: March 26, 2012Date of Patent: March 17, 2015Assignee: Seiko Instruments Inc.Inventor: Takeshi Sugiyama
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Patent number: 8982656Abstract: Provided is a semiconductor non-volatile memory device capable of improving the accuracy of trimming by creating a written state before data is written into a non-volatile memory element. The semiconductor non-volatile memory device includes: a written data transmission circuit for transmitting written data to a non-volatile memory element; a first switch connected between the non-volatile memory element and a data output terminal; a third switch connected to an output terminal of the written data transmission circuit; and a control circuit for controlling the respective switches. When a test mode signal is input, the control circuit turns on only the first switch and the third switch so as to control the written data to be output to the data output terminal before data is written into the non-volatile memory element.Type: GrantFiled: January 30, 2014Date of Patent: March 17, 2015Assignee: Seiko Instruments Inc.Inventors: Makoto Mitani, Kotaro Watanabe
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Patent number: 8982675Abstract: A power supply unit has a first power supply circuit that supplies a voltage to a load driving unit and a second power supply circuit that supplies a voltage to circuits other than the load driving unit. A first switching unit connects any one of a power supply that supplies a power supply voltage and a voltage step-down circuit that supplies a step-down voltage of the power supply voltage to the first power supply circuit. A second switching unit connects any one of the power supply and the voltage step-down circuit to the second power supply circuit. A control unit controls the connection by the first switching unit and the connection by the second switching unit to switch the voltage supplied to the first power supply circuit and the voltage supplied to the second power supply circuit in accordance with properties of the load driving unit.Type: GrantFiled: August 31, 2011Date of Patent: March 17, 2015Assignee: Seiko Instruments Inc.Inventors: Kazuo Kato, Akira Takakura, Toshitaka Fukushima, Keisuke Tsubata, Hisao Nakamura, Tomohiro Ihashi, Yoshinori Sugai, Eriko Noguchi, Satoshi Sakai, Takanori Hasegawa
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Patent number: 8982494Abstract: A head gimbal assembly has a suspension configured to extend along a surface of a recording medium and to bend and deform in a thickness direction of the recording medium. A slider is provided on a front end side of the suspension so as to confront the surface of the recording medium. A support section supports the slider such that the slider can pivot about two axes parallel to the surface of the recording medium and perpendicular to each other. An optical waveguide is connected to the slider and is configured to introduce a light flux into the slider. A near-field light generating element generates near-field light from the optical flux and causes the near-field light to record information on the recording medium. A positioning section is mounted between the support section and the slider for positioning the optical waveguide relative to the slider.Type: GrantFiled: July 10, 2009Date of Patent: March 17, 2015Assignee: Seiko Instruments Inc.Inventors: Masakazu Hirata, Manabu Oumi, Majung Park, Sachiko Tanabe
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Patent number: 8978215Abstract: In a method of manufacturing piezoelectric actuators, a vibrating body plate supporting vibrating bodies at vibrational nodes thereof and a moving body plate having moving bodies are provided. Each of the vibrating bodies has a vibrator and a piezoelectric body mounted on the vibrator. The vibrating body plate and the moving body plate are stacked over one another to provide a piezoelectric actuator assembly. The piezoelectric actuator assembly is then cut at the vibrational nodes of the vibrating bodies to provide individual piezoelectric actuators.Type: GrantFiled: June 21, 2001Date of Patent: March 17, 2015Assignee: Seiko Instruments Inc.Inventors: Satoshi Watanabe, Tatsuro Sato, Kazuo Tani, Yoko Shinohara
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Patent number: 8975710Abstract: By covering ends of a field insulating film in a region where a MOS transistor having a relatively thin gate insulating film is formed with a relatively thick gate insulating film, a channel region of the MOS transistor having the relatively thin gate insulating film is set apart from an inversion-preventing diffusion layer formed under the field insulating film so as not to be influenced by film thickness fluctuation of the field insulating film, etching fluctuation of the relatively thick gate insulating film, and impurity concentration fluctuation at both sides of the channel due to the inversion-preventing diffusion layer.Type: GrantFiled: August 14, 2013Date of Patent: March 10, 2015Assignee: Seiko Instruments Inc.Inventor: Yuichiro Kitajima
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Patent number: 8976508Abstract: The electrochemical cell of the present invention is provided with a hermetic container having a base member, a jointing material fixed to the base member, and a lid member welded on the base member via the jointing material, and in which a housing space sealed between the base member and the lid member is defined, and an electrochemical element which is housed inside the housing space and which is available to effect charging and discharging, wherein the lid member is made of stainless steel.Type: GrantFiled: October 24, 2013Date of Patent: March 10, 2015Assignee: Seiko Instruments Inc.Inventors: Tsuneaki Tamachi, Ryo Sato, Kenji Ogata, Isamu Shinoda, Shunji Watanabe
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Patent number: 8964357Abstract: An electric double layer capacitor with a low resistance value is disclosed. The electric double layer capacitor includes an electrochemical device in the inside of a housing container and capable of achieving charge and discharge via external terminals, wherein the electrochemical device includes a pair of electrodes, a separator disposed between the pair of electrodes, and an electrolytic solution with which the pair of electrodes and the separator are impregnated; when a volume between the pair of electrodes is designated as Ve, and a volume of a void in an inter-electrode part of the separator disposed between the pair of electrodes is designated as Se, an inter-electrode part void ratio Re is defined as Re=Se/Ve×100 (%); and when a thickness of the inter-electrode part is designated as L2 (?m), and a separator evaluation index Ie is defined as Ie=L2/Re (?m/%), a relation of Ie?1.0 (?m/%) is satisfied.Type: GrantFiled: March 15, 2013Date of Patent: February 24, 2015Assignee: Seiko Instruments Inc.Inventors: Tsuneaki Tamachi, Ryo Sato, Kazumi Tanaka, Kensuke Tahara, Tadahito Suzuki, Akira Sato
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Patent number: 8963224Abstract: Provided is a semiconductor device including, on the same semiconductor substrate, a transistor element, a capacitor, and a resistor. The capacitor is formed on an active region, and the resistor is formed on an element isolation region, both formed of the same polysilicon film. By CMP or etch-back, the surface is ground down while planarizing the surface until a resistor has a desired thickness. Owing to a difference in height between the active region and the element isolation region, a thin resistor and a thick upper electrode of the capacitor are formed to prevent passing through of a contact.Type: GrantFiled: October 8, 2013Date of Patent: February 24, 2015Assignee: Seiko Instruments Inc.Inventors: Ayako Inoue, Kazuhiro Tsumura
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Patent number: 8957659Abstract: Provided is a voltage regulator having improved transient response characteristics even when a load current is switched from a light load to a heavy load. The voltage regulator includes, to a gate of a detection transistor constituting an output current detection circuit: a resistive element for interrupting the gate of the detection transistor from an output terminal of a differential amplifier circuit in an AC manner; and a capacitive element connected to an output terminal of the voltage regulator in an AC manner.Type: GrantFiled: February 27, 2013Date of Patent: February 17, 2015Assignee: Seiko Instruments Inc.Inventors: Manabu Fujimura, Takashi Imura, Yuji Kobayashi
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Patent number: 8957638Abstract: To solve a problem in that, even after a charge inhibition signal is input from an input terminal and a charge control transistor is turned OFF, if a load is connected between external terminals (EB+, EB?), a discharge current flows, and to solve another problem of power consumption of a charge/discharge control circuit (22), provided is a charge/discharge control circuit for controlling charge/discharge of a secondary battery, the charge/discharge control circuit including: a switch circuit for controlling a current that flows through the charge/discharge control circuit; a control circuit for controlling an operation of the switch circuit; and an input terminal to which a signal for controlling an operation of the charge/discharge control circuit is input from outside. In this way, when a signal is input to the input terminal from outside, the discharge current is interrupted, thereby reducing current consumption of the charge/discharge control circuit.Type: GrantFiled: June 1, 2012Date of Patent: February 17, 2015Assignee: Seiko Instruments Inc.Inventors: Fumihiko Maetani, Kazuaki Sano, Toshiyuki Koike, Takashi Ono
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Patent number: 8947484Abstract: A printer comprising: a housing having an accommodating portion that accommodates recording paper and opens in a direction crossing the direction of gravity; a cover coupled to the housing in an openable and closable manner, and closing the accommodating portion; a control unit provided on the cover and having a circuit board; an lever provided in the housing at a position above the control unit in the direction of gravity and opening the cover; and a discharge path provided on the cover outside the control unit and leading liquid having entered through between the lever and the control unit toward an area below the control unit in the direction of gravity, wherein the discharge path including an upstream side end disposed on the cover below the lever in the direction of gravity.Type: GrantFiled: June 18, 2014Date of Patent: February 3, 2015Assignee: Seiko Instruments Inc.Inventors: Kazuyuki Aizawa, Hiroyuki Kohira
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Patent number: 8945733Abstract: A magnetic recording medium in which information can be recorded using a heat-assisted magnetic recording method comprises a recording layer formed on a substrate. The recording layer has a plurality of magnetic recording bit regions and a plurality of high thermal conductors each extending inside a corresponding one of the bit regions. The high thermal conductors have a thermal conductivity higher than that of the recording layer and assist in dissipating heat energy imparted to the bit regions during the recording of information.Type: GrantFiled: March 16, 2012Date of Patent: February 3, 2015Assignee: Seiko Instruments Inc.Inventors: Yoshikazu Tanaka, Norio Chiba, Manabu Oumi, Masakazu Hirata, Yoko Shinohara, Sachiko Tanabe
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Patent number: 8947335Abstract: In method of driving a bistable nematic dot-matrix liquid crystal display panel, a first pulse voltage is applied to nematic liquid crystal molecules to raise the nematic liquid crystal molecules in the longitudinal direction. After application of the first pulse voltage, a second pulse voltage is applied to the nematic liquid crystal molecules for selecting one of two stable orientation states of the nematic liquid crystal molecules. Immediately after the application of the second pulse voltage, an AC pulse waveform of a voltage lower than a last pulse of the second pulse voltage is applied to thereby remove residual electric charges remaining in the bistable nematic dot-matrix liquid crystal display panel.Type: GrantFiled: April 21, 2011Date of Patent: February 3, 2015Assignee: Seiko Instruments Inc.Inventors: Masafumi Hoshino, Hisayuki Hirayama
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Patent number: 8946664Abstract: A low-cost, compact, high-reliability optical sensor device has an optical sensor element mounted in a package comprised of a light shielding glass lid substrate, a part of which has a light filter function, adhered to a light shielding glass substrate having a cavity. In a through hole in the light shielding glass lid substrate, glass having a function of absorbing infrared light and transmitting visible light by its own property is embedded. The light shielding glass substrate is made of glass having light shielding property as its own property.Type: GrantFiled: May 15, 2012Date of Patent: February 3, 2015Assignee: Seiko Instruments Inc.Inventors: Koji Tsukagoshi, Hitoshi Kamamori, Sadao Oku, Hiroyuki Fujita, Keiichiro Hayashi
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Patent number: 8947159Abstract: Provided is a reference voltage generation circuit that has a flat temperature characteristic even when there are fluctuations in manufacturing step. After a semiconductor manufacturing process is finished, electrical characteristics of a semiconductor device are evaluated. Temperature characteristic of each reference voltage (VREF) of three unit reference voltage generation circuits (10) is evaluated. Then only a unit reference voltage generation circuit (10) having the most flat temperature characteristics is selected from among the three unit reference voltage generation circuits (10). Only fuses (13, 14) of the selected unit reference voltage generation circuit (10) are not cut, but other fuses (13, 14) are cut. Accordingly only the selected unit reference voltage generation circuit (10) operates, and the other unit reference voltage generation circuits (10) do not operate.Type: GrantFiled: February 19, 2014Date of Patent: February 3, 2015Assignee: Seiko Instruments Inc.Inventor: Hideo Yoshino