Patents Assigned to Seiko Instuments Inc.
  • Patent number: 7586160
    Abstract: A semiconductor integrated circuit is provided in which a CMOS transistor is formed on a first conductivity type semiconductor film provided on a first conductivity type supporting substrate through an embedded insulating film. Second conductivity type source and drain regions are formed in the semiconductor film. The source region has an ultra-shallow high-density second conductivity type source extension region at a boundary with a channel region, a low-density second conductivity type source extension region under the ultra-shallow high-density second conductivity type source extension region, and a high-density second conductivity type source extension region under the low-density second conductivity type source extension region.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: September 8, 2009
    Assignee: Seiko Instuments Inc.
    Inventors: Miwa Wake, Yoshifumi Yoshida
  • Patent number: 6207996
    Abstract: A semiconductor device is provided without degrading the performance of an internal circuit, which has an SOI structure coexistingly having an SOI static electricity protection circuit to prevent an internal circuit from being damaged due to static electricity through an input/output pad. To achieve this, a structure is made by comprising a silicon substrate of a first conductivity type, a buried oxide film formed on the silicon substrate, a first silicon layer of the first conductivity type formed on the buried oxide film, a second silicon layer of the first conductivity type formed on the buried oxide film and having a thickness smaller than the first silicon layer of the first conductivity type, and an SOI static electricity protection circuit provided between an input/output pad and an internal circuit.
    Type: Grant
    Filed: November 29, 1999
    Date of Patent: March 27, 2001
    Assignee: Seiko Instuments Inc.
    Inventors: Fumiyasu Utsunomiya, Yoshifumi Yoshida
  • Patent number: 4973963
    Abstract: A plurality of waveguide elements are arranged to form an electromagnetic wave absorbing lattice in opposed relation to the advancing wave surface of the incident electromagnetic wave. Each waveguide element has a front opening on the lattice receptive of a part of the incident electromagnetic wave, a rear end portion spaced rearwardly from the front opening, and an inner peripheral surface portion extending between the front opening and the rear end portion to define a cavity effective to wave-guide the received electromagnetic wave. The inner peripheral surface portion has a given electric resistivity to effect absorption of the received electromagnetic wave during the wave-guiding thereof without substantial reflection thereof.
    Type: Grant
    Filed: November 18, 1988
    Date of Patent: November 27, 1990
    Assignee: Seiko Instuments Inc.
    Inventors: Moriyoshi Kurosawa, Kazuo Wakabayashi, Tsutomu Miyata, Hiroyuki Tokita, Yoshiyuki Kitakoga, Yasuo Mizuno, Masaki Hikida, Tohimasa Hayashi