Patents Assigned to Semi, Inc.
  • MOS circuit recovery time
    Patent number: 3959782
    Abstract: An MOS device is usually connected to a power supply through an MOS device which is connected so that load current can be supplied to the MOS circuit when it is turned on and leakage current can be supplied thereto when it is turned off. It has been found that the recovery time of such an arrangement upon turn off is substantially longer than the turn on time. This invention provides a method and means for minimizing the recovery time.
    Type: Grant
    Filed: December 4, 1974
    Date of Patent: May 25, 1976
    Assignee: Semi, Inc.
    Inventor: William C. Dunn
  • Sense line coupling reduction system
    Patent number: 3942164
    Abstract: The inductive and capacitive coupling between adjacent sense lines in a semi-conductor memory is minimized by periodically interchanging the locations of the two sense lines assigned to each column of storage cells in a semi-conductor memory.
    Type: Grant
    Filed: January 30, 1975
    Date of Patent: March 2, 1976
    Assignee: Semi, Inc.
    Inventor: William C. Dunn
  • Sense line balancing circuit
    Patent number: 3936810
    Abstract: In semiconductor memory cells of the type including flip flop circuits in each cell and two sense output lines for determining the binary bits stored in the cell, an attempt to read data stored in the cell after a previous operation, before the sense lines have been fully restored to their quiescent state can result in the loss of data. This invention provides a means for restoring the sense lines very rapidly after an operation so that loss of data is prevented and the memory may be accessed at a higher frequency.
    Type: Grant
    Filed: January 20, 1975
    Date of Patent: February 3, 1976
    Assignee: Semi, Inc.
    Inventor: William C. Dunn