Patents Assigned to Semi Technology Design, Inc.
  • Patent number: 5736890
    Abstract: A rectifying device comprising of a SRMOS, an inductor, and a control circuit is disclosed. The SRMOS has a gate, a drain, and a source. The gate of the SRMOS is connected to the output of the control circuit. The inductor is connected to the drain of the SRMOS. The control circuit uses two sense traces for determining the voltage (or current) passing between the inductor (that is connected to the drain) and the source of the SRMOS. Upon sensing a forward characteristic (voltage or current), the SRMOS forward biases to allow current to flow through the SRMOS. Upon sensing a reverse characteristic (voltage or current), the SRMOS reverse biases to cut off any current flow. Hysteresis is used in setting the forward biasing threshold voltage and the reverse biasing threshold voltage for the SRMOS. In reverse biasing and forward biasing the SRMOS, V.sub.gs is stepped (or curved) controlled to avoid false turn ON/OFF of the SRMOS.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: April 7, 1998
    Assignees: Semi Technology Design, Inc., Shindergen Electric Mfg. Co., Ltd
    Inventors: H. P. Yee, Hiromi Ito, Kenji Horiguchi, Satoru Sawahata