Patents Assigned to Semiconductor Conponents Industries, LLC
  • Patent number: 8049309
    Abstract: In one embodiment, an edge seal region of a semiconductor die is formed by forming a first dielectric layer on a surface of a semiconductor substrate near an edge of the semiconductor die and extending across into a scribe grid region of the semiconductor substrate. Another dielectric layer is formed overlying the first dielectric layer. An opening is formed through the first and second dielectric layers. The second dielectric layer is used as a mask for forming a doped region on the semiconductor substrate through the opening. A metal is formed that electrically contacts the doped region and an exterior edge of the first dielectric layer within the opening.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: November 1, 2011
    Assignee: Semiconductor Conponents Industries, LLC
    Inventors: Gordon M. Grivna, Shanghui L. Tu