Patents Assigned to Semiconductor Technologies & Instruments, PTE, Ltd.
  • Patent number: 11887876
    Abstract: The present disclosure relates to a system (100) for handling components (102). The system (100) comprises a turret assembly (200) comprising a turret (202) rotatable about a horizontal axis (204); and a plurality of end effectors (206) around the turret (202) and aligned radially from the horizontal axis (204). The system (100) further comprises a support assembly (300) arranged to support a source substrate (302) comprising singulated components (102); and a component transfer assembly (400) arranged to support a component transfer medium (402) for receiving the singulated components (102) from the end effectors (206). The turret assembly (200), support assembly (300), and component transfer assembly (400) are arranged vertically to each other. During rotation of the turret (202), 200 the end effectors (206) continually pick the singulated components (102) from the source substrate (302) and place the picked singulated components (102) on the component transfer medium (402).
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: January 30, 2024
    Assignee: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventor: Chin Fong Han
  • Patent number: 10504761
    Abstract: A 3D object inspection process includes: capturing an object bottom surface 3D profile (a) while an object top surface freely rests on an object seating surface, or (b) without forcibly compressing the top surface of the object against a reference structure distinct from a suction tip; capturing an object top surface 3D profile while (c) the object bottom surface freely rests on the object seating surface, or (d) without forcibly compressing the bottom surface of the object against the reference structure; capturing a plurality of object sidewall images; generating a 3D composite image comprising a 3D digital reconstruction or estimation of the object based upon or using a bottom surface 3D profile image dataset, a top surface 3D profile image dataset, and the sidewall image dataset; and determining a set or array of total object and/or object main body contour values and/or thickness values from the 3D composite image.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: December 10, 2019
    Assignee: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE. LTD.
    Inventor: Ajharali Amanullah
  • Patent number: 10475690
    Abstract: A system is disclosed for calibrating the compressive forces exerted on a component during a component retrieval process from a carrier or support surface by a component handling device. The system includes a sensor, a component pickup assembly having a reference structure, a housing and a spring guide holder coupled to a suction tip. A resilient member may reside within the housing and the reference structure such that the spring guide holder and the housing are spaced from each other to define a variable first gap thereinbetween. A gate is formed by the reference structure and a sheath located on the housing whereby the reference structure is spaced from the housing to define a variable second gap thereinbetween. A detection structure is located within the variable second gap such that the sensor is able to detect portions of the detection structure.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: November 12, 2019
    Assignee: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE. LTD.
    Inventors: Lian Seng Ng, Lian Aik Tan, Mun Fai Lye
  • Patent number: 10312124
    Abstract: A wafer table structure providing a single wafer table surface suitable for handling both wafers and film frames includes a base tray having a set of compartments formed therein by way of a set of ridges formed in or on an interior base tray surface; a hardenable fluid permeable compartment material disposed within the set of base tray compartments; and a set of openings formed in the base tray interior surface by which the hardened compartment material is exposable to negative or positive pressures. The base tray includes a first ceramic material (e.g., porcelain), and the hardenable compartment material includes a second ceramic material. The base tray and the compartment material are simultaneously machinable by way of a standard machining process to thereby planarize exposed outer surfaces of the base tray and the hardened compartment material at an essentially identical rate for forming a highly or ultra-planar wafer table surface.
    Type: Grant
    Filed: September 2, 2013
    Date of Patent: June 4, 2019
    Assignee: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventors: Jian Ping Jin, Leng Kheam Lee
  • Patent number: 10262885
    Abstract: A multifunction wafer and film frame handling system includes a wafer table assembly having a wafer table providing an ultra-planar wafer table surface configured for carrying a wafer or a film frame, and at least one of: a flattening apparatus configured for automatically applying a downward force to portions of a warped or non-planar wafer in a direction normal to the wafer table surface; a displacement limitation apparatus configured for automatically constraining or preventing uncontrolled lateral motion of a wafer relative to the wafer table surface after cessation of an applied negative pressure and application of a positive pressure to the underside of the wafer via the wafer table; and a rotational misalignment compensation apparatus configured for automatically compensating for a rotational misalignment of a wafer mounted on a film frame.
    Type: Grant
    Filed: September 2, 2013
    Date of Patent: April 16, 2019
    Assignee: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventors: Jian Ping Jin, Leng Kheam Lee
  • Patent number: 10161881
    Abstract: An inspection system for inspecting a semiconductor wafer. The inspection system comprises an illumination setup for supplying broadband illumination. The broadband illumination can be of different contrasts, for example brightfield and darkfield broadband illumination. The inspection system further comprises a first image capture device and a second image capture device, each configured for receiving broadband illumination to capture images of the semiconductor wafer while the semiconductor wafer is in motion. The system comprises a number of tube lenses for enabling collimation of the broadband illumination. The system also comprises a stabilizing mechanism and an objective lens assembly. The system further comprises a thin line illumination emitter and a third image capture device for receiving thin line illumination to thereby capture three-dimensional images of the semiconductor wafer.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: December 25, 2018
    Assignee: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventors: Ajharali Amanullah, Lin Jing, Han Cheng Ge, Kok Weng Wong
  • Patent number: 10128140
    Abstract: Automatically correcting for rotational misalignment of a wafer improperly mounted on a film frame includes capturing an image of portions of the wafer using an image capture device, prior to initiation of a wafer inspection procedure by an inspection system; digitally determining a rotational misalignment angle and a rotational misalignment direction of the wafer relative to the film frame and/or a set of reference axes of a field of view of the image capture device; and correcting for the rotational misalignment of the wafer by way of a film frame handling apparatus separate from the inspection system, which is configured for rotating the film frame across the rotational misalignment angle in a direction opposite to the rotational misalignment direction. Such film frame rotation can occur prior to placement of the film frame on the wafer table, without decreasing film frame handling throughput or inspection process throughput.
    Type: Grant
    Filed: September 2, 2013
    Date of Patent: November 13, 2018
    Assignee: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventor: Jing Lin
  • Patent number: 9863889
    Abstract: A method and a system for inspecting a wafer. The system comprises an optical inspection head, a wafer table, a wafer stack, a XY table and vibration isolators. The optical inspection head comprises a number of illuminators, image capture devices, objective lens and other optical components. The system and method enables capture of brightfield images, darkfield images, 3D profile images and review images. Captured images are converted into image signals and transmitted to a programmable controller for processing. Inspection is performed while the wafer is in motion. Captured images are compared with reference images for detecting defects on the wafer. An exemplary reference creation process for creating reference images and an exemplary image inspection process is also provided by the present invention. The reference image creation process is an automated process.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: January 9, 2018
    Assignee: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventors: Ajharali Amanullah, Han Cheng Ge
  • Patent number: 9816938
    Abstract: A component inspection process includes positioning a component (e.g., a semiconductor component or other object) such that component sidewalls are disposed along an optical path corresponding to sidewall beam splitters configured for receiving sidewall illumination provided by a set of sidewall illuminators, and transmitting this sidewall illumination therethrough, toward and to component sidewalls. Sidewall illumination incident upon component sidewalls is reflected from the component sidewalls back toward the sidewall beam splitters, which reflect or redirect this reflected sidewall illumination along an optical path corresponding to an image capture device for sidewall image capture to enable component sidewall inspection.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: November 14, 2017
    Assignee: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventor: Ajharali Amanullah
  • Patent number: 9620398
    Abstract: An apparatus for handling or transferring a semiconductor component. The apparatus comprises a first structure and a second structure coupled thereto. The first structure and the second structure define a vacuum chamber therebetween. The second structure comprises at least one module coupled thereto. Each module comprises a passageway defined therethrough. Vacuum is applied through the passageway for facilitating pick up of the semiconductor component at a first position and for securing the semiconductor component to the module during displacement of the module from the first position to a second position. The apparatus comprises a plunger. Displacement of the plunger from a retracted position to an extended position impedes fluid communication between the passageway of the module and the chamber. Displacement of the plunger to the extended position further causes purging of air through the passageway of the module to thereby detach the semiconductor component from the module.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: April 11, 2017
    Assignee: Semiconductor Technologies & Instruments PTE LTD
    Inventors: Jianping Jin, Lee Kwang Heng
  • Patent number: 9524897
    Abstract: An end handler and method for processing a device are presented. The end handler includes a mating portion for mating with a tool and a support portion for supporting a film frame on a support surface. The support portion includes a support base section, extension sections extending from the support base section, and vacuum ports on the support surface for facilitating mating of the film frame on the support surface. Each of the vacuum port includes at least one reservoir having at least one vacuum opening in fluid communication with at least one vacuum source. The vacuum ports being configured to principally maintain a slimmest profile with strongest suction force possible.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: December 20, 2016
    Assignee: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventors: Jian Ping Jin, Lee Kwang Heng
  • Publication number: 20150233840
    Abstract: An inspection system for inspecting a semiconductor wafer. The inspection system comprises an illumination setup for supplying broadband illumination. The broadband illumination can be of different contrasts, for example brightfield and darkfield broadband illumination. The inspection system further comprises a first image capture device and a second image capture device, each configured for receiving broadband illumination to capture images of the semiconductor wafer while the semiconductor wafer is in motion. The system comprises a number of tube lenses for enabling collimation of the broadband illumination. The system also comprises a stabilizing mechanism and an objective lens assembly. The system further comprises a thin line illumination emitter and a third image capture device for receiving thin line illumination to thereby capture three-dimensional images of the semiconductor wafer.
    Type: Application
    Filed: September 25, 2013
    Publication date: August 20, 2015
    Applicant: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Ajharali Amanullah, Jing Lin, Kok Weng Wong
  • Publication number: 20150214085
    Abstract: A multifunction wafer and film frame handling system includes a wafer table assembly having a wafer table providing an ultra-planar wafer table surface configured for carrying a wafer or a film frame, and at least one of: a flattening apparatus configured for automatically applying a downward force to portions of a warped or non-planar wafer in a direction normal to the wafer table surface; a displacement limitation apparatus configured for automatically constraining or preventing uncontrolled lateral motion of a wafer relative to the wafer table surface after cessation of an applied negative pressure and application of a positive pressure to the underside of the wafer via the wafer table; and a rotational misalignment compensation apparatus configured for automatically compensating for a rotational misalignment of a wafer mounted on a film frame.
    Type: Application
    Filed: September 2, 2013
    Publication date: July 30, 2015
    Applicant: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventors: Jian Ping Jin, Leng Kheam Lee
  • Patent number: 8885918
    Abstract: A method for inspecting a wafer. The method comprises a training process for creating reference images. The training process comprises capturing a number of images of a first wafer of unknown quality, each of the number of images of the first wafer being captured at a predetermined contrast illumination and each of the number of images of the first wafer comprising a plurality of pixels. The training process also comprises determining a plurality of reference intensities for each of the plurality of pixels of each of the number of images of the first wafer, calculating a plurality of statistical parameters for the plurality of reference intensities of each of the plurality of pixels of each of the number of images of the first wafer, and selecting a plurality of reference images from the plurality of images of the first wafer based on the calculated plurality of statistical parameters.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: November 11, 2014
    Assignee: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Ajharali Amanullah, Albert Archwamety, Hongtu Guo
  • Patent number: 8834091
    Abstract: A system and method for transferring component panes from a component pane storage station to a vacuum table assembly are disclosed. The system includes a number of component pane handlers, for instance two handlers, and a pick and place mechanism or arm. The handler transfers the component panes from the station to the mechanism. The system includes an alignment module configured to facilitate spatial alignment of the component pane while the component pane is coupled to the handler. The module can be carried by the mechanism. Spatial alignment of the component pane can be substantially completed before transfer of the component pane from the handler to the mechanism. The mechanism includes a set of vacuum elements or pads that enables pick up of the component pane from the handler as well as release and pick up of the component pane at the vacuum table assembly.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: September 16, 2014
    Assignee: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Jian Ping Jin, Lee Kwang Heng
  • Patent number: 8744617
    Abstract: A component pane handling apparatus configured to handle component panes of multiple different sizes is disclosed. The apparatus includes at least one component pane capture element that can be displaced between a number of different positions, each position corresponding to a particular component pane size. Therefore, the at least one component pane capture element can be positioned to different positions for allowing handling of component panes of corresponding sizes. The apparatus also includes a position alignment mechanism configured to control displacement of the at least one component pane capture element to the different positions. The apparatus can also include one displacement arm coupled to the component pane capture element. The displacement of the component pane capture element can be effectuated by a displacement of at least a portion of the displacement arm. A method for handling component panes of multiple sizes is also included in this disclosure.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: June 3, 2014
    Assignee: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Jian Ping Jin, Lee Kwang Heng
  • Publication number: 20120288352
    Abstract: A system and method for transferring component panes from a component pane storage station to a vacuum table assembly are disclosed. The system includes a number of component pane handlers, for instance two handlers, and a pick and place mechanism or arm. The handler transfers the component panes from the station to the mechanism. The system includes an alignment module configured to facilitate spatial alignment of the component pane while the component pane is coupled to the handler. The module can be carried by the mechanism. Spatial alignment of the component pane can be substantially completed before transfer of the component pane from the handler to the mechanism. The mechanism includes a set of vacuum elements or pads that enables pick up of the component pane from the handler as well as release and pick up of the component pane at the vacuum table assembly.
    Type: Application
    Filed: May 14, 2012
    Publication date: November 15, 2012
    Applicant: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventors: Jian Ping JIN, Lee Kwang HENG
  • Publication number: 20120288353
    Abstract: A component pane handling apparatus configured to handle component panes of multiple different sizes is disclosed. The apparatus includes at least one component pane capture element that can be displaced between a number of different positions, each position corresponding to a particular component pane size. Therefore, the at least one component pane capture element can be positioned to different positions for allowing handling of component panes of corresponding sizes. The apparatus also includes a position alignment mechanism configured to control displacement of the at least one component pane capture element to the different positions. The apparatus can also include one displacement arm coupled to the component pane capture element. The displacement of the component pane capture element can be effectuated by a displacement of at least a portion of the displacement arm. A method for handling component panes of multiple sizes is also included in this disclosure.
    Type: Application
    Filed: May 14, 2012
    Publication date: November 15, 2012
    Applicant: SEMICONDUCTOR TECHNOLOGIES & INSTRUMENTS PTE LTD
    Inventors: Jian Ping JIN, Lee Kwang HENG
  • Publication number: 20100232915
    Abstract: An apparatus for handling or transferring a semiconductor component. The apparatus comprises a first structure and a second structure coupled thereto. The first structure and the second structure define a vacuum chamber therebetween. The second structure comprises at least one module coupled thereto. Each module comprises a passageway defined therethrough. Vacuum is applied through the passageway for facilitating pick up of the semiconductor component at a first position and for securing the semiconductor component to the module during displacement of the module from the first position to a second position. The apparatus comprises a plunger. Displacement of the plunger from a retracted position to an extended position impedes fluid communication between the passageway of the module and the chamber. Displacement of the plunger to the extended position further causes purging of air through the passageway of the module to thereby detach the semiconductor component from the module.
    Type: Application
    Filed: March 12, 2010
    Publication date: September 16, 2010
    Applicant: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Jianping Jin, Lee Kwang Heng
  • Publication number: 20100189339
    Abstract: A method for inspecting a wafer. The method comprises a training process for creating reference images. The training process comprises capturing a number of images of a first wafer of unknown quality, each of the number of images of the first wafer being captured at a predetermined contrast illumination and each of the number of images of the first wafer comprising a plurality of pixels. The training process also comprises determining a plurality of reference intensities for each of the plurality of pixels of each of the number of images of the first wafer, calculating a plurality of statistical parameters for the plurality of reference intensities of each of the plurality of pixels of each of the number of images of the first wafer, and selecting a plurality of reference images from the plurality of images of the first wafer based on the calculated plurality of statistical parameters.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 29, 2010
    Applicant: Semiconductor Technologies & Instruments Pte Ltd
    Inventors: Ajharali Amanullah, Albert Archwamety, Hongtu Guo