Patents Assigned to Semiconductor Testing Advanced Research Lab Inc.
  • Publication number: 20080252317
    Abstract: Apparatus for testing System-In-Package (SIP) devices is described. The apparatus utilizes industry standard JEDEC trays and transports the trays into a tester.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252314
    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests at least a predetermined portion of all devices in such trays at the same time. The apparatus comprises a test hive comprising: a plurality of test circuits corresponding in number to at least a predetermined number of cells in the tray: and a plurality of groups of test contacts, each group is coupled to one of the test circuits and is oriented to engage the plurality of electrical contacts of a SIP device disposed in a corresponding one of the cells. The lest hive is operable to simultaneously, electrically test at least a predetermined number of the number of the SIP devices in each tray engaged by the hive without removing the SIP devices from the tray.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252322
    Abstract: A method for testing System-In-Package (SIP) devices such as micro SD devices each having a plurality of electrical leads is described. The method utilizes industry standard JEDEC trays and tests all devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252320
    Abstract: Apparatus for testing micro SD devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time. The apparatus comprises a test hive comprising: a plurality of test circuits corresponding in number to at least a predetermined number of cells in the tray: and a plurality of groups of test contacts, each group is coupled to one of the test circuits and is oriented to engage the plurality of electrical contacts of a micro SD device disposed in a corresponding one of the cells. The test hive is operable to simultaneously, electrically test at least a predetermined number of the number of the micro SD devices in each tray engaged by the hive without removing the micro SD devices that did pass electrical testing until a tray of electrically tested micro SD devices is fully populated with micro SD devices that did pass electrical testing.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252323
    Abstract: A method and apparatus for testing micro SD devices each having a plurality of electrical leads is described. The method and apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252321
    Abstract: Apparatus for testing micro SD devices each having a plurality of electrical leads is described. The and apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252313
    Abstract: A method for testing System-In-Package (SIP) devices each having a plurality of electrical contacts is described. The method and apparatus utilizes industry standard JEDEC trays and tests at least a predetermined portion of all devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252318
    Abstract: A method for testing micro SD devices each having a plurality of electrical leads is described. The method utilizes industry standard JEDEC trays and tests at least a predetermined portion of the devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252319
    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical contacts is described. The apparatus utilizes industry standard JEDEC trays and tests at least a predetermined portion of the devices in such trays at the same time.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen
  • Publication number: 20080252312
    Abstract: Apparatus for testing System-In-Package (SIP) devices each having a plurality of electrical leads is described. The apparatus utilizes industry standard JEDEC trays and tests all devices in such trays at the same time. The apparatus of the illustrative embodiment comprises a test hive comprising: a plurality of test circuits corresponding in number to the number of cells in the tray; and a plurality of groups of test contacts, each of the groups of the test contacts being coupled to one of the test circuits and being oriented to engage the plurality of electrical contacts of a SIP device disposed in a corresponding one of the cells, the test hive being operable to simultaneously, electrically test all of the SIP devices in each tray engaged by the hive without removing the SIP devices from the tray.
    Type: Application
    Filed: April 12, 2007
    Publication date: October 16, 2008
    Applicant: Semiconductor Testing Advanced Research Lab Inc.
    Inventors: James E. Hopkins, Michael Peter Costello, Herbert Tsai, Ching-Too Chen