Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A vertically oriented thermal processor supporting semiconductor wafers within a vertical processing chamber within a process tube about which a furnace heater is supported utilizes a model-base control target in combination with a heating control system configured to heat portions of the furnace in order to achieve a thermally uniform processing chamber environment. A furnace power controller implements a dynamic control system configured to achieve a desired uniform thermal distribution within the processing chamber during various processing cycles for semiconductor wafers. Preferably, the control system monitors thermal conditions within the chamber and compares the conditions with a desired thermal model of the furnace, and activates/deactivates one or more heater elements within the furnace in order to achieve a desired thermal condition within the processing chamber.

Abstract: A semiconductor workpiece holder used in electroplating systems for plating metal layers onto a semiconductor workpieces, and is of particular advantage in connection with plating copper onto semiconductor materials. The workpiece holder includes electrode assemblies which have a contact part which connects to a distal end of an electrode shaft and bears against the workpiece and conducts current therebetween. The contact part is preferably made from a corrosion resistant material, such as platinum. The electrode assembly also preferably includes a dielectric layer which covers the distal end of the electrode shaft and seals against the contact part to prevent plating liquid from corroding the joint between these parts.

Abstract: A method for creating an oxide coating on the surface of a component formed from austenitic stainless steel or nickel alloy steel is set forth. The component has a naturally formed oxide film at the surface. The naturally formed oxide is enhanced through a process comprising at least two steps. In the first step, the component is heated in the presence of circulating dry air for a first period of time at a temperature of approximately 300 degrees centigrade. In the second step, the component is heated in the presence of static dry air at an elevated pressure for a second period of time at a temperature that is higher than the temperature during the first period. The exterior portion of the enhanced oxide coating is removed with an oxidizing treatment whereby an oxide coating having a high ratio of chromium to iron is exposed at the surface of the stainless steel.

Abstract: A semiconductor workpiece holder for use in processing a semiconductor workpiece includes a workpiece support operatively mounted to support a workpiece in position for processing. A finger assembly is operatively mounted upon the workpiece support and includes a finger tip. The finger assembly is movable between an engaged position in which the finger tip is engaged against the workpiece, and a disengaged position in which the finger tip is moved away from the workpiece. Preferably, at least one electrode forms part of the finger assembly and includes an electrode contact for contacting a surface of said workpiece. At least one protective sheath covers at least some of the electrode contact. According to one aspect of the invention, a sheathed electrode having a sheathed electrode tip is positioned against a semiconductor workpiece surface in a manner engaging the workpiece surface with said sheathed electrode tip.

Abstract: A method for use in the manufacture of a microelectronic device is set forth. The method include to a first step in which a workpiece including exposed aluminum metallized surfaces and residues is provided. The workpiece, including the exposed aluminum metallized surfaces, is then treated with an alkaline, water-based solution containing one or more components that form an aluminosilicate on the exposed aluminum metallized surfaces. The solution reacts with the residues and assists in removing them from the workpiece. Preferably, the solution is comprised of DI water, and ammonium hydroxide based component, such as TMAH, silicic acid, and aluminum hydroxide.

Abstract: Processing methods and systems using vapor phase processing streams made from a liquid phase source and feed gas. Some versions use multiple liquid sources and multiple vapor generators which each produce vapors which are mixed. Some of the vapor generators use metering pumps to inject a controlled flow of liquid into a controlled flow of feed gas. In some embodiments the vapors are exsiccated to reduce saturation before being introduced as a processing chamber vapor mixture into a processing chamber. The semiconductor pieces are preferably rotated within the processing chamber and can be processed in batches.

Abstract: A vertically oriented thermal processor for processing batches of semiconductor wafers held within a processing chamber. The processing chamber is contained within a processing vessel. A furnace liner surrounds the processing vessel in spaced relationship. A first flow of cooling fluid is supplied upwardly between the processing vessel and furnace liner. The incoming first flow also serves to cool the base plate assembly which is constructed to shield the processing chamber from off-gassing. A second flow path of cooling fluid is supplied downwardly between the furnace liner and an inner wall of the furnace heater in countercurrent relationship to the first flow. An outflow baffle and outflow cooler are also advantageously included to isolate the processing chamber and cool the exhausting gases. A preferred power supply system is also described.

Abstract: A vertically oriented thermal processor for processing batches of semiconductor wafers held within a processing chamber. The processing chamber is contained within a processing vessel. Processing gases are discharged through a processing chamber outflow. An outflow cooler is included to cool gases exhausting from the processing chamber outflow. The outflow cooler includes a fluid heat exchanger and a flow diverter which directs the exhausting gases against cooled walls of the outflow cooler. The cooler also preferably has a liner which lines a casing to which the heat exchanger is connected.

Abstract: A vertically oriented thermal processor for processing batches of semiconductor wafers held within a processing chamber. The processing chamber is contained within a processing vessel. A furnace liner surrounds the processing vessel in spaced relationship. A flow path for cooling fluid is supplied between the furnace liner and an inner wall of the furnace heater. The flow occurs through end and base segments forming part of the furnace heating enclosure. The end and base segments have interior ports which communicate with a manifold chamber. The manifold chamber is advantageously divided into inner and outer chambers by shields which reflect radiant heat. The inner and outer manifold chambers are connected by manifold connecting passages formed between the shields.

Abstract: Controllers and associated methods for controlling a thermal reactor or other thermal semiconductor processors which include a heating element powered by a power source, and having profile thermocouples and spike thermocouples. One preferred method comprises the following steps: modeling thermal dynamic characteristics of the thermal reactor, the modeling step including providing thermocouple instrumented wafers in the thermal reactor, perturbing the thermal reactor by controlling the heating element using a stimulation sequence, and developing models based on changes in temperature created by the perturbations. The models are developed off-line and can include one or more models, such as a model of power versus spike thermocouple readings, a model of spike thermocouple readings versus profile thermocouple readings, and a model of profile thermocouple readings versus thermocouple instrumented wafer readings.

Abstract: A processor for processing semiconductor articles, such as integrated circuit wafers, flat panel displays, semiconductor substrates, and data disks. The processor has an interface section which receives articles in article carriers. The interface section transfers the articles from carriers into processing arrays. A conveyor having an automated arm assembly moves article arrays to and between processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A semiconductor wafer subject to a metallization etching process includes post-etching residue that is removed using a fluorine containing solution having a substantial amount of CO.sub.2 dissolved therein. Alternatively, or in addition, a fluorine containing solution, or the like, that has been used to remove the residue is rinsed from the wafer using a solvent containing a substantial amount of O.sub.3 dissolved therein. In each instance, pitting of the metallization layer is reduced.

Abstract: A vertically oriented thermal processor supports semiconductor wafers within a vertical process chamber within a process tube about which a furnace heater is supported. A base plate support assembly mates with a processing vessel such that the interior surface in proximate fluid adjoining relation with the processing chamber is formed from substantially-inert materials. Additionally, the base plate support assembly includes fluid cooling features that protect seals formed by devices passing through the base plate assembly into the processing chamber for delivery of processing gases and monitoring of thermal conditions therein. Additionally, cooling features are provided in a base plate in order to prevent components from becoming heat sinks or heat sources in relation to the processing chamber.

Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A processor for processing integrated circuit wafers, semiconductor substrates, data disks and similar units requiring very low contamination levels. The processor has an interface section which receives wafers in standard wafer carriers. The interface section transfers the wafers from carriers onto novel trays for improved processing. The interface unit can hold multiple groups of multiple trays. A conveyor having an automated arm assembly moves wafers supported on a tray. The conveyor moves the trays from the interface along a track to several processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A centrifugal semiconductor processing system having a rotor which holds articles for centrifugal processing. The rotor includes a rotor frame with a receiver for holding the wafers or other articles in a spaced array without a wafer carrier to improve fluid access to the wafers. The rotor also has one or more retainers which are pivoted relative to the rotor to controllably urge the wafers into their desired processing positions. The retainers are preferably constructed to provide initial spring biasing with added restraining forces being generated during rotation. The processing system also preferably includes an implement mounted on a robot for loading the rotor, and a vision system to aid in the loading operation.

Abstract: A processor for processing semiconductor articles, such as integrated circuit wafers, flat panel displays, semiconductor substrates, and data disks. The processor has an interface section which receives articles in article carriers. The interface section transfers the articles from carriers into processing arrays. A conveyor having an automated arm assembly moves article arrays to and between processing stations. The processing stations are accessed from an enclosed area adjoining the interface section.

Abstract: A semiconductor processing station which utilizes a processing head and processing base which are complementary to enclose a processing chamber. The processing head shown has a rotor with two portions both of which rotate. The rotor has axial movable portions which include a piece holder. The piece holder supports a wafer or other semiconductor piece being processed. The piece holder can be axially extended and retracted relative to a thin membrane which acts as a cover to prevent chemicals from reaching the back side of the wafer during processing.

Abstract: Apparatus (20) for cleaning carriers used to hold semiconductor wafers, substrates, data disks, flat panel displays and similar containers used in applications highly sensitive to contamination. The apparatus has a processing bowl (21) with entrance and exit ports (34, 36) through which carriers are installed and removed from processing chamber (21). Rotor (70) rotates within the processing chamber. Rotor (70) includes a rotor cage (71) which mounts detachable wafer carrier supports (214). Filtered, heated air is passed through the process chamber for drying. Cleaning liquid and additional drying gas can be supplied through manifolds (120, 110) positioned inside and outside rotor cage (71).