Patents Assigned to SFI Electronics Technology Inc.
  • Patent number: 11404209
    Abstract: An electrical device package structure and manufacturing method thereof is disclosed. The manufacturing method comprises: providing an electrical device body having at least two electrodes, wherein an outer surface of the electrical device body is partially covered by the electrodes, and outer surfaces of the electrodes are covered by a plastic material; forming a first protective layer including phosphate salt at least on the exposed outer surface of the electrical device body; and forming a second protective layer including glass at least on an exposed outer surface of the first protective layer. The present invention can prevent the electrical device body and/or the electrodes from being damaged on their manufacturing process, and avoid a forming high impedance layer on an electrode.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: August 2, 2022
    Assignee: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Len, Hong Zong Xu, Zhi Xian Xu, Hsing Tsai Huang, Jie-An Zhu
  • Patent number: 8488291
    Abstract: A ZnO surge arrester for high-temperature operation is characterized in that a grain boundary layer between ZnO grains thereof contains a BaTiO3-based positive temperature coefficient thermistor material, which takes 10-85 mol % in the overall grain boundary layer, and when operating temperature raises, the positive temperature coefficient thermistor material in the grain boundary layer has its resistance sharply increasing with the raising temperature, so as to compensate or partially compensate decrease in resistance of components in the grain boundary layer caused by the raising temperature, thereby making the resistance of the grain boundary layer in the ZnO surge arrester more independent of temperature. The ZnO surge arrester thus is suitable for operation where a maximum operating temperature is higher than 125° C., or even higher than 150° C.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: July 16, 2013
    Assignee: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Lien, Jie-An Zhu, Zhi-Xian Xu, Xing-Xiang Huang, Ting-Yi Fang
  • Patent number: 8363382
    Abstract: A multilayer ceramic device comprises a laminated ceramic body having opposite end surfaces, a pair of conductive electrodes each respectively attached to one end surface of the laminated ceramic body and a plurality of alternately staggered internal electrodes within the laminated ceramic body configured in an alternating manner and each electrically connected to the corresponding conductive electrodes respectively; each conductive electrodes of the multilayer ceramic device is further covered with a solder paste layer so that the multilayer ceramic device is thus made without any plating step and no need of treating waste liquid nickel or waste liquid tin as well as no problem of environmental pollution caused by plating solution, thereby lowering manufacturing costs and reducing processing time.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: January 29, 2013
    Assignee: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Lien, Hong-Zong Xu
  • Publication number: 20120208040
    Abstract: A multilayer ceramic device comprises a laminated ceramic body having opposite end surfaces, a pair of conductive electrodes each respectively attached to one end surface of the laminated ceramic body and a plurality of alternately staggered internal electrodes within the laminated ceramic body configured in an alternating manner and each electrically connected to the corresponding conductive electrodes respectively; each conductive electrodes of the multilayer ceramic device is further covered with a solder paste layer so that the multilayer ceramic device is thus made without any plating step and no need of treating waste liquid nickel or waste liquid tin as well as no problem of environmental pollution caused by plating solution, thereby lowering manufacturing costs and reducing processing time.
    Type: Application
    Filed: February 10, 2011
    Publication date: August 16, 2012
    Applicant: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn LIEN, Hong-Zong Xu
  • Publication number: 20120135563
    Abstract: A low-temperature firing process is available for cost saving to produce a multilayer chip ZnO varistor containing pure silver (Ag) formed as internal electrodes and calcined at ultralow firing temperature of 850-900° C., which process comprises: a) individually preparing ZnO grains in advance doped with doping ions for promotion of semi-conductivity of ZnO grains if calcined; b) individually preparing a desired high-impedance sintering material to be fired as grain boundaries to encapsulate ZnO grains; c) mixing the doped ZnO grains of Step a) with the high-impedance sintering material of Step b) in a predetermined ratio to form a mixture and proceeding with an initial sintering to have the mixture sintered and ground as composite ZnO ceramic powders, and d) processing the sintered mixture of Step c) to make multilayer chip ZnO varistors containing pure silver (Ag) internal electrodes but sintered at ultralow firing temperature of 850-900° C.
    Type: Application
    Filed: November 17, 2011
    Publication date: May 31, 2012
    Applicant: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn LIEN, Jie-An ZHU
  • Publication number: 20120057265
    Abstract: A ZnO surge arrester for high-temperature operation is characterized in that a grain boundary layer between ZnO grains thereof contains a BaTiO3-based positive temperature coefficient thermistor material, which takes 10-85 mol % in the overall grain boundary layer, and when operating temperature raises, the positive temperature coefficient thermistor material in the grain boundary layer has its resistance sharply increasing with the raising temperature, so as to compensate or partially compensate decrease in resistance of components in the grain boundary layer caused by the raising temperature, thereby making the resistance of the grain boundary layer in the ZnO surge arrester more independent of temperature. The ZnO surge arrester thus is suitable for operation where a maximum operating temperature is higher than 125° C., or even higher than 150° C.
    Type: Application
    Filed: February 9, 2011
    Publication date: March 8, 2012
    Applicant: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn LIEN, Jie-An Zhu, Zhi-Xian Xu, Xing-Xiang Huang, Ting-Yi Fang
  • Patent number: 7724124
    Abstract: A low-capacitance multilayer chip varistor has capacitance lower than 0.5 pF at 1 MHz and has a characteristic of resisting more than thousands of times of 8 KV electrostatic shock, which comprises a ceramic main body, outer electrodes disposed at two ends of the ceramic main body and inner electrodes disposed therein; the ceramic main body comprises inorganic glass of 3˜50 wt % and semi-conductive or conductive particles of 50˜97 wt % with particle size of more than 0.1 ?m, and a layer of inorganic glass film covers the surface of semi-conductive or conductive particles, wherein the inorganic glass film contains semi-conductive or conductive particles of submicron or nanometer which is smaller than 1 micron, and the quantity contained of semi-conductive or conductive particles is less than 20 wt % of that of inorganic glass.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: May 25, 2010
    Assignee: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang, Xing-Guang Huang, Wei-Cheng Lien
  • Publication number: 20100117271
    Abstract: A process for producing zinc oxide varistors is to perform the doping of zinc oxide and the sintering of zinc oxide grains with a high-impedance sintering material through two independent procedures, so that the doped zinc oxide and the high-impedance sintering material are well mixed in a predetermined ratio and then used to make the zinc oxide varistors through conventional technology by low-temperature sintering (lower than 900° C.); the resultant zinc oxide varistors may use pure silver as inner electrode and particularly possess one or more of varistor properties, thermistor properties, capacitor properties, inductor properties, piezoelectricity and magnetism.
    Type: Application
    Filed: July 9, 2009
    Publication date: May 13, 2010
    Applicant: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Lien, Jie-An Zhu, Cheng-Tsung Kuo, Jiu-Nan Lin, Zhi-Xian Xu, Hong-Zong Xu, Ting-Yi Fang, Xing-Xiang Huang
  • Patent number: 7541910
    Abstract: A multilayer zinc oxide varistor without bismuth oxide system ingredients, and having variable breakdown voltages by controlling the thickness of the ceramic material; the varistor is bismuth-free and composed of zinc oxide as the primary constituent with alkaline earth element (Ba) as first additive, at least one of transition elements of Mn, Co, Cr, or Ni as second additives, at least one of rare earth elements of Pr, La, Ce, Nd or Tb as third additives and at least one of B, Si, Se, Al, Ti, W, Sn, Sb, Na, or K as rest additives, and the bismuth-free and zinc oxide based varistor exhibits an excellent ESD (Electro-Static Discharge) withstanding characteristic.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: June 2, 2009
    Assignee: SFI Electronics Technology Inc.
    Inventors: Wei-Cheng Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang
  • Publication number: 20080191834
    Abstract: A low-capacitance multilayer chip varistor has capacitance lower than 0.5 pF at 1 MHz and has a characteristic of resisting more than thousands of times of 8 KV electrostatic shock, which comprises a ceramic main body, outer electrodes disposed at two ends of the ceramic main body and inner electrodes disposed therein; the ceramic main body comprises inorganic glass of 3˜50 wt % and semi-conductive or conductive particles of 50˜97 wt % with particle size of more than 0.1 ?m, and a layer of inorganic glass film covers the surface of semi-conductive or conductive particles, wherein the inorganic glass film contains semi-conductive or conductive particles of submicron or nanometer which is smaller than 1 micron, and the quantity contained of semi-conductive or conductive particles is less than 20 wt % of that of inorganic glass.
    Type: Application
    Filed: February 12, 2007
    Publication date: August 14, 2008
    Applicant: SFI Electronics Technology Inc.
    Inventors: Ching-Hohn Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang, Xing-Guang Huang, Wei-Cheng Lien
  • Publication number: 20070273469
    Abstract: A multilayer zinc oxide varistor without bismuth oxide system ingredients, and having variable breakdown voltages by controlling the thickness of the ceramic material; the varistor is bismuth-free and composed of zinc oxide as the primary constituent with alkaline earth element (Ba) as first additive, at least one of transition elements of Mn, Co, Cr, or Ni as second additives, at least one of rare earth elements of Pr, La, Ce, Nd or Tb as third additives and at least one of B, Si, Se, Al, Ti, W, Sn, Sb, Na, or K as rest additives, and the bismuth-free and zinc oxide based varistor exhibits an excellent ESD (Electro-Static Discharge) withstanding characteristic.
    Type: Application
    Filed: May 25, 2006
    Publication date: November 29, 2007
    Applicant: SFI Electronics Technology Inc.
    Inventors: Wei-Cheng Lien, Cheng-Tsung Kuo, Jun-Nun Lin, Jie-An Zhu, Li-Yun Zhang