Abstract: Disclosed is an operational amplifier, including: a loading input transistor pair; a differential input transistor pair, which is connected with the loading input transistor pair, has a non-inverting input terminal receiving a non-inverting input signal, and has an inverting input terminal receiving an inverting input signal; a controller unit, generating a first control signal according to the non-inverting input signal and a second control signal according to the inverting input signal; a regulator unit, connected between the differential input transistor pair and ground, controlled by the first control signal and the second control signal, and select an on/off state of the regulator unit itself according to a voltage difference between the non-inverting and inverting input signals, which is withstood by a MOS transistor with high withstand voltage, thus allowing a source-drain voltage of the input transistor pair to be within a voltage range accepted by process.

Abstract: A pulse width modulation circuit for an audio avoidance signal, which includes the circuit includes a power supply unit, a selection unit and a pulse width modulation unit; wherein the power supply unit includes a first voltage regulator and a second voltage regulator, which are respectively used to stabilize the system voltage and the bus voltage and output them alternately to the chip detection pin; the selection unit is used to divide the system voltage and the bus voltage, and output the selection voltage after comparing with the reference voltage, and the selection voltage controls the power supply unit and the pulse width modulation unit respectively; the pulse width modulation unit is used to receive the selection voltage of the selection unit, and realize the adjustment of the pulse width of the output signal based on the comparison of the enable signal.

Abstract: An oscillator circuit includes a frequency setting circuit, a first and a second clock signal generating circuit, a clock synchronization circuit, a control circuit, and an output circuit. The first and second clock signal generating circuits generate first and second clock signals respectively. The control circuit outputs a frequency setting signal via a second node, outputs the first clock signal via a sixth node, and outputs the second clock signal via a seventh node when the first frequency selecting signal is at an effective voltage level; otherwise, outputs a second synchronization control signal via the second node, outputs an external synchronization clock signal via the sixth node, and outputs a first clock signal via the seventh node. The clock synchronization circuit generates the first and second synchronization control signals. The output circuit outputs the first or second clock signal.

Abstract: A control circuit for a multi-phase power conversion circuit and a multi-phase power supply are provided. The conversion circuit includes a plurality of switching circuits which have output terminals being coupled together to supply power to a load. The control circuit includes an error amplifier, a pulse width modulation circuit, and a multi-phase logic control circuit. The multi-phase logic control circuit generates a plurality of PWM signals according to an on time signal, which are delayed phase by phase and control on and off states of the plurality of switching circuits, and each of which has a pulse width being consistent with the on time signal. This reduces the circuit size and cost of the multi-phase power supply controller, and solves the problem of phase-to-phase current oscillation in a case that the switching circuits operate under duty ratios independent for various phases.

Abstract: The provided is a digital-to-analog conversion circuit based on an R-2R ladder resistor network architecture. The digital-to-analog conversion circuit based on an R-2R ladder resistor network architecture includes: branch resistors, branch switches, bridge resistors, a first compensation resistor, a second compensation resistor and third compensation resistors; specifically, the compensation resistors (the first compensation resistor, the second compensation resistor and the third compensation resistor) are introduced into an R-2R network in a progressive way, a Differential Nonlinearity (DNL) introduced by mismatch between the compensation resistor and on-state impedance of the branch switch may effectively attenuate due to decrease of the resistance of the compensation resistor at a higher branch, even if it may increase with increase of the resistance of the compensation resistor at a lower branch, the lower DNL may attenuate per se, so the overall DNL will decrease.

Abstract: The present disclosure relates to a switching converter and its control circuit. The control circuit includes an error amplifier, a transient-response compensation circuit and a PWM comparator. The transient-response compensation circuit is coupled to an output terminal of the error amplifier for increasing a differential current of the error amplifier to increase the rate of output change of the error amplifier in a case that a voltage difference between the first feedback signal and the reference voltage exceeds a predetermined threshold. The output voltage can be prevented from having too high or too low fluctuations when a load changes, thereby improving transient response characteristics of the power converter, and optimizing dynamic characteristics of the power converter over a wide range of the fluctuation of the load in a continuous operation mode.

Abstract: A digital-to-analog converter includes a sampling resistor network circuit, an operational amplifier, a feedback resistor, and a compensation current generation circuit. The sampling resistor network circuit controls a sampling resistance value of the sampling resistor network circuit based on a sampling codeword, and generates an output current based on a voltage difference between a first reference voltage and a voltage at a first input terminal of the operational amplifier as well as the sampling resistance value. The compensation current generation circuit generates a compensation current based on the sampling codeword. The compensation current is used to compensate for an offset current generated by an offset voltage in the sampling resistor network circuit in order to make a sum of the compensation current and the offset current equal to a first constant. The first constant is independent of the sampling codeword.

Abstract: A Direct Current (DC)-DC converter, a chip, and an electronic device are provided. The DC-DC converter includes an upper power transistor, a lower power transistor, an inductor, a bootstrap capacitor, a first transistor, a charging control circuit, a drive control circuit, and a driver circuit. Both ends of the bootstrap capacitor are respectively coupled to a first node and a first electrode of the first transistor. The charging control circuit is configured to generate a charging control voltage according to a Pulse Width Modulation (PWM) signal. When the PWM signal is at a first level, the charging control voltage is set to a voltage at the first electrode of the first transistor, and when the PWM signal is at a second level, the charging control voltage is set to a voltage at the first node. A control electrode of the first transistor is provided with the charging control voltage.

Abstract: A switching converter includes a power circuit, a control circuit, and a regulation circuit. The power circuit regulates an output current through the load with at least one main switching transistor. The control circuit couples to the power circuit and controls on and off states of the at least one main switching transistor in accordance with a reference voltage received to control a minimum peak inductor current through an inductor. The regulation circuit provides the reference voltage to the control circuit and adaptively regulates the reference voltage in accordance with the input voltage and the output voltage. An effect of a duty ratio on an inductor current can be canceled out when the duty cycle changes due to fluctuations in the input and output voltages. An output current is kept approximately constant in a burst mode, thereby effectively reducing output ripple and noise.

Abstract: Disclosed in an interface circuit, in which: a current input circuit receives an input current signal of a signal input terminal, an input voltage detection circuit compares an input voltage signal of the signal input terminal with a reference voltage, and provides a detection signal to the current input circuit according to the comparison result, a phase-inversion output circuit is connected with the current input circuit at the first node, and generates a voltage conversion signal according to a voltage potential of the first node, and a buffer circuit performs signal shaping on the voltage conversion signal to obtain an output signal. The current input circuit pulls up the voltage potential of the first node when the detection signal indicates that the input voltage signal is greater than the reference voltage and the input current signal is greater than a reference current.

Abstract: A high-voltage input stage circuit without bias current includes a high-voltage conversion unit, a clamping unit and an input unit. The high-voltage conversion unit is connected to the clamping unit, and is used to generate a unique switching voltage based on the magnitude of the differential input voltage, and the switching voltage is respectively input into the positive phase clamping unit and the negative phase clamping unit of the clamping unit. The clamping unit is connected to the high-voltage conversion unit and the input unit, and is used to realize conduction or shutdown based on the switching voltage to input the differential input voltage into the input unit; the input unit is used to realize voltage output to the subsequent load.

Abstract: Disclosed is a controller and a control method of a thermoelectric cooler-heater device. The controller includes a switching power supply coupled to the thermoelectric cooler-heater device to provide a first driving current; and a constant-current constant-voltage power supply coupled to the thermoelectric cooler-heater device to provide a second driving current. According to a temperature detection signal, one of the switching power supply and the constant-current constant-voltage power supply operates, the first driving current is a continuous driving current flowing from an anode end to a cathode end of the thermoelectric cooler-heater device, the second driving current is a pulse driving current flowing from the cathode end to the anode end.

Abstract: Disclosed are a switching converter and an oscillator thereof. The oscillator includes a charging current generating circuit and a clock signal generator circuit, which is used for generating a clock signal according to a charging current provided by the charging current generating circuit. The charging current generating circuit includes a variable resistor and a current limiting module. The current limiting module is used for limiting a current value of the charging current to a preset current value when the variable resistor is shorted or opened, thus avoiding drastic change of a switching frequency of the circuit when the external variable resistor is shorted or opened, so as to improve system stability.

Abstract: Disclosed is a low dropout linear voltage regulator and a control circuit thereof. The control circuit includes an error amplifier and a backflow prevention circuit, which compares an input voltage with an output voltage, to switch a substrate voltage and a voltage at a control terminal of the power transistor to a higher one of the input voltage and the output voltage, thus the power transistor and its parasitic diode can be turned off in time when the output voltage is greater than the input voltage, so as to prevent the power transistor from being damaged by current backflow and improve reliability of the low dropout linear regulator.

Abstract: A one-shot circuit is provided. The one-shot circuit includes a one-shot main circuit and a shielding time window circuit. The one-shot main circuit is configured to receive, through a NOR gate, an input signal of the one-shot circuit, the feedback of an output signal of the one-shot circuit, and a time window signal output by the shielding time window circuit, and then obtain the output signal through a first RC delay circuit and a logic gate. The time window signal is a signal that resists the interference of the abnormal pulse of the input signal with the output signal. The shielding time window circuit is configured to receive the feedback of the output signal, and then obtain the time window signal through a second RC delay circuit and a logic gate.

Abstract: An LDO circuit and method with constant power consumption without internal compensation capacitor, the circuit including: a power supply module, which supplies power to the LDO circuit based on a power supply and a current mirror; a bias module, which implements current bias based on a bias current and a current mirror; an output voltage divider feedback module, which feeds back the output voltage divider to the operational amplifier module based on a voltage divider resistor; an input voltage divider feedback module, which feeds back the input voltage divider to the operational amplifier module based on a voltage divider resistor; an operational amplifier module, which, based on input voltage divider feedback and output voltage divider feedback, sets the value of the offset resistor so that the output tube is always in the saturation zone, thereby achieving the purpose of keeping the circuit power consumption constant.

Abstract: A field of memory technologies and a reading circuit for a differential one time programmable (OTP) memory including a first and second memory cells in a differentially symmetrical structure, the reading circuit connects between the first and second memory cells and includes: a detector having a first and second connected to respective first and second memory cells, configured to detect one of a resistance value of a first or second fuse of respective first and second memory cells, and a resistance difference between the first and second fuse after a burn-in operation of the first or second memory is completed; and a latch connected to the detector, provides a readout data according to one of the resistance value of the first or second fuse, and the resistance difference. The reading circuit may both read out data normally and detect a resistance value of the fuse.

Abstract: A one-shot circuit is provided. The one-shot circuit includes a one-shot main circuit and a shielding time window circuit. The one-shot main circuit is configured to receive, through a NOR gate, an input signal of the one-shot circuit, the feedback of an output signal of the one-shot circuit, and a time window signal output by the shielding time window circuit, and then obtain the output signal through a first RC delay circuit and a logic gate. The time window signal is a signal that resists the interference of the abnormal pulse of the input signal with the output signal. The shielding time window circuit is configured to receive the feedback of the output signal, and then obtain the time window signal through a second RC delay circuit and a logic gate.

Abstract: A battery protection chip, a polling detection method and a polling detection circuit based on a battery protection chip are provided. The circuit includes: a polling signal generator generating first and second selection signals based on a basic clock signal, a plurality of state signals and a priority of a plurality of detection items. An input array selector selects one of a plurality of reference signals and one of a plurality of feedback signals to output to a comparator based on the first selection signal; the comparator compares the feedback reference signals and outputs an indication signal. An output sampler samples the indication signal according to the second selection signal and updates the plurality of state signals according to a sampling result.

Abstract: Disclosed is a low dropout linear regulator including a power transistor and an error amplifier having a first input stage, a second input stage and a control circuit. The first input stage includes a first pair of transistors receiving an output voltage and a reference voltage, the second input stage includes a second pair of transistors receiving the output voltage and the reference voltage, the first and second pairs of transistors have different conductivity types. The control circuit controls turn-on and turn-off states of the first input stage according to the reference voltage, and turns on the first input stage when the reference voltage is less than a preset threshold, so that the error amplifier operates normally and the output voltage changes smoothly. When the reference voltage is greater than the preset threshold, the control circuit turns off the first input stage so that only the second input stage operates.