Abstract: The present invention relates to a circuit of reception of bits transmitted on an asynchronous signal, including a circuit for providing a clock reconstructed from the asynchronous signal, this clock being used to sample the asynchronous signal to form a synchronous output signal, and a reception error detection circuit. The reception error detection circuit includes an edge detector providing a detection pulse for each edge of predetermined direction of the asynchronous signal; and an alarm circuit activating an alarm signal when an edge of predetermined direction of the synchronous signal occurs outside a detection pulse.

Abstract: A device for comparing currents comprises a first resistor (R1) connected between a high voltage source (VCC) and a connection node (N), first and second current source (I1, I2) connected between a low voltage source (VEE) and the connection node by first and second switches (S1, S2) closed during the first and second phases, a first differential amplifier (A1), a first input (-) of which is connected with the connection node by a first capacitor (C1), a second input (+) of which is connected with an intermediate voltage source, and the output of which is connected with the input (-) by a third switch (S3) closed during the first phase, a second resistor (R2) having a high value with respect to the first resistor connected between the connection node and the intermediate voltage source, and servo-control means operating during a phase preliminary to the first and second phases for urging the voltage on the connection node to be equal to the intermediate voltage, when the first switch is closed.