Abstract: A device and associated method for limiting a current surge in a capacitor connected to the output of a rectifying bridge having its input connected to an a.c. voltage, the bridge being a composite bridge and being associated with means for synchronizing the turning-on of the bridge from zero crossings of the voltage of the a.c. power supply.

Abstract: The invention relates to a device to neutralize an electronic circuit when it is being powered or disconnected. It can be applied more particularly to electronic circuits powered by low voltages on the order of 1.8 volts. The device of the invention is not significantly affected by variations, due to manufacturing conditions, in the values of its components. The invention may be applied to the field of programmable electrical memories.

Abstract: A monolithic assembly includes vertical power semiconductor components formed throughout the thickness of a low doped semiconductive wafer of a first conductivity type, whose bottom surface is uniformly coated with a metallization. At least some of these components, so-called autonomous components, are formed in insulated sections of the substrate, whose lateral insulation is provided by a diffused wall of the second conductivity type and whose bottom is insulated through a dielectric layer interposed between the bottom surface of the substrate and the metallization.

Abstract: A processor and coprocessor architecture wherein the coprocessor is put into operation at a cycle immediately following the decoding of an instruction code by the recognition, during this decoding, of the fact that this instruction is an instruction that has to be carried out by the coprocessor. The complementary decoding of the instructions makes it possible to lose no time in the configuration of the coprocessor. This type of architecture is particularly useful for digital processors entrusted with carrying out certain specific operations, notably audio processing operations.

Abstract: An electrically modifiable multilevel non-volatile memory has autonomous refresh means. The multilevel memory has a real-time clock delivering pulses to periodically activate an operation for refreshing the memory cells of the main matrix. The memory has application to the field of large-capacity memories, for example, several tens of megabits and more.