Abstract: A servo-demodulator for a pair of alternating signals generated by a magnetic disc read head and indicative of the position of the read head in relation to the center of a recorded track. The servo-demodulator comprises a peak detector for successively and individually sampling the amplitude of each of a plurality of peaks of the pair of alternating signals, and a capacitor periodically connected to the output of the peak detector by a control logic for deriving a weighted average of the various successively sampled amplitudes. In this manner, the control logic obtains an averaged measure of amplitude with high immunity to noise.

Abstract: The present invention relates to a pump of resin deposition on a semiconductive wafer including a pump body divided by a membrane of definition of a resin dispensation chamber and of a control chamber and an element of filtration of the resin before its dispensation to an outlet access of the pump body. The pump includes a control system for injecting the resin under constant pressure into the control chamber and aspiring the resin from the control chamber, and a capacitive presence sensor for detecting a first position of the membrane.

Abstract: A method for reducing the number of bits needed to represent constant values in a data processing device. A group of constant values is defined by selecting them as a function of their statistical frequency of use. Each constant value of this group in the instructions is represented by means of a shorter coded operand field and a current instruction is loaded from a bus in an instruction register. A corresponding operand field is derived from the coded operand field of the current instruction by expansion means, and a bus and an output of the expansion means are selectively connected as input to an arithmetic logic unit.

Abstract: A driver circuit delays the turning on of a MOS transistor by utilizing the time-wise pattern of the circuit input signal rather than generating a delay within the circuit itself. A threshold type of circuit element is arranged so that no current flows toward or from, depending on the type of the MOS transistor, the control terminal before the voltage at the circuit input exceeds a predetermined value. This is achieved, for example, by coupling a Zener diode serially to the control terminal. Where the input signal is of a kind which increases with a degree of uniformity, the time required to exceed that threshold will correspond to the desired delay. Thus, the driver circuit can match the dynamic range of the input signal automatically.

Abstract: In a voltage-limiting circuit, the voltage to be limited is applied to the terminals of a resistive line, and the current flowing in this line is amplified by a current mirror that thus produces a reference current. A current-controlled voltage source receives this reference current and produces a reference voltage. This reference voltage is given to a hysteresis comparator that switches over for two distinct values of the voltage to be regulated. The disclosed device is particularly useful in the field of the load pumps used in electrically programmable memories.

Abstract: An analog multiplier includes at least a differential output stage formed by a pair of emitter-coupled bipolar transistors. Each transistor of the pair of emitter-coupled bipolar transistors is driven by a predistortion stage having a reciprocal of a hyperbolic tangent transfer function that is attributable to the base currents of the bipolar transistors used in the predistortion stage. The error in the output signal produced by the analog multiplier is compensated by generating replicas of the base currents of the bipolar transistors of the differential output stage and forcing those replica currents on the output node of a respective predistortion stage. Various embodiments that consume different amounts of power are described.

Abstract: An integrated programming circuitry for an electrically programmable semiconductor memory device comprises a plurality of programming load circuits, each one associated with a respective memory matrix portion or group of columns, and a plurality of programming load control circuits, each one controlling the activation of one respective programming load circuit according to the logic state of a respective data line carrying a datum to be programmed; the memory device comprises a group of redundancy bit lines and an associated redundancy programming load circuit; each programming load control circuit comprises decoding means supplied with signals which, when a defective column address is supplied to the memory device during programming, are generated from a matrix portion identifying code stored in a non-volatile register wherein the defective column address is stored, and switch means responsive to a decoded signal at the output of said decoding means to enable the activation of the redundancy programming load

Abstract: Memories in integrated circuit form can have several amplifiers per data contact. To increase the possibilities of redundancy with a given number of redundancy columns without, causing too much space near the memory zone to be occupied by complicated multiplexers, the address AP used to select a single amplifier for each contact is used also to select one group of memories among several groups (as many groups as there are amplifiers per contact) in a defective address storage register. Only the defective addresses of this group are applied to a comparator used to detect whether a defective column address is received by the memory. A correlation is thus set up between the place where the defective column is located and the place where the redundancy column, which will be used to replace it, is located. This correlation results from the simultaneous selection by AP of a group of amplifiers and of a group of defective column addresses connected to these amplifiers.

Abstract: An acoustic feedback suppression device, particularly for auxiliary ringers in plug-in telephone systems, includes diodes in addition to a rectifier bridge of the ringer. The circuit provides direct-current decoupling and limits the AC voltage present across the auxiliary ringer.

Abstract: A device for switching from the write mode to the read mode includes a read head connected between a first and a second input terminal of the differential amplifier, the second input terminal being connected to a constant voltage through a capacitor and to the amplifier output through the resistor. The apparatus includes a circuit for generating a voltage ramp, after a write operation; a circuit for discharging an initial current in the read head proportionally to the voltage ramp between the beginning of the ramp and a first threshold voltage of the ramp; a switch for shorting the resistor to a low value, at least between the first threshold voltage and a second ramp threshold voltage; and a detector for detecting the second threshold voltage and for providing, in the vicinity of the threshold, a progressive control of the switch.

Abstract: A metal semiconductor ohmic contact farming process consists of enrichment of the surface of the semiconductor on which contact is to be formed, by ion implantation of a dopant, followed by deposition of a metal film on the implanted surface and then by thermal annealing at a temperature lower than 500.degree. C. and for a period shorter than 60 minutes.

Abstract: A circuit for generating non-overlapping complementary clock signals at a double frequency from an input clock signal. An NAND flip-flop (2) has complementary outputs on which double frequency signals are available. A D-type flip-flop (3) receives on its clock input (H) one of the outputs of the NAND flip-flop, and has its output (Q.sub.D) coupled to its data input (D) through an inverter. Two Exclusive OR gates (XO1, XO2) receive on their first inputs the input clock signal and its complement, respectively, and on their second input the output of the D-type flip-flop. The outputs of the OR gates are connected to the inputs (E1 and E2) of the NAND flip-flop, respectively.

Abstract: The regulation of the output voltage of a voltage multiplier driven by a ring oscillator, an inverter of which is substituted by a NOR gate for providing a terminal through which stopping the oscillation, is effected by controlling the oscillation frequency in function of the current delivered by the voltage multiplier by means of a transistor T1 working as a current generator connected in series with a regulating chain of series-connected diodes by biasing the gate of the transistor with a constant voltage Vref, thus imposing a reference current Iref through the transistor. The voltage signal across the transistor is fed to the input of a first inverter with a preset triggering threshold and the output signal of the inverter is fed through an amplifying and phase-regenerating stage to said terminal for stopping the oscillation of said NOR gate of the ring oscillator.

Abstract: The instant invention relates to a test structure for an integrated circuit for determining the incidence of various conduction effects on given layers and separating the surface effects from the wedge effects and the periphery effects into two perpendicular directions, wherein test patterns of determined shapes are incorporated into elementary components comprising the given layers transversely polarized, further comprising at least four test patterns (11, 13, 15, 17) in which the given layers are delimited according to four rectangles, each of which has a common dimension with another one, that is, those four rectangles have only two length values (YD) and two width values (XD).

Abstract: The invention concerns a method in which the edge of the slices is made to slide in contact with the surfaces of a pad soaked in acid substances and in which, during the process, the areas of the edge of the slices that have been in contact with the pad are periodically washed with a special liquid.

Abstract: A refrigerant fluid trap for a vacuum evaporator for depositing a thin metal film including a U-shaped structure for passage of refrigerant fluid, forming an interior space for trapping condensable vapors. In said interior space there is housed a titanium evaporation source.