Abstract: The present invention relates to a pump of resin deposition on a semiconductive wafer including a pump body divided by a membrane of definition of a resin dispensation chamber and of a control chamber and an element of filtration of the resin before its dispensation to an outlet access of the pump body. The pump includes a control system for injecting the resin under constant pressure into the control chamber and aspiring the resin from the control chamber, and a capacitive presence sensor for detecting a first position of the membrane.

Abstract: In a voltage-limiting circuit, the voltage to be limited is applied to the terminals of a resistive line, and the current flowing in this line is amplified by a current mirror that thus produces a reference current. A current-controlled voltage source receives this reference current and produces a reference voltage. This reference voltage is given to a hysteresis comparator that switches over for two distinct values of the voltage to be regulated. The disclosed device is particularly useful in the field of the load pumps used in electrically programmable memories.

Abstract: Memories in integrated circuit form can have several amplifiers per data contact. To increase the possibilities of redundancy with a given number of redundancy columns without, causing too much space near the memory zone to be occupied by complicated multiplexers, the address AP used to select a single amplifier for each contact is used also to select one group of memories among several groups (as many groups as there are amplifiers per contact) in a defective address storage register. Only the defective addresses of this group are applied to a comparator used to detect whether a defective column address is received by the memory. A correlation is thus set up between the place where the defective column is located and the place where the redundancy column, which will be used to replace it, is located. This correlation results from the simultaneous selection by AP of a group of amplifiers and of a group of defective column addresses connected to these amplifiers.

Abstract: An acoustic feedback suppression device, particularly for auxiliary ringers in plug-in telephone systems, includes diodes in addition to a rectifier bridge of the ringer. The circuit provides direct-current decoupling and limits the AC voltage present across the auxiliary ringer.

Abstract: A device for switching from the write mode to the read mode includes a read head connected between a first and a second input terminal of the differential amplifier, the second input terminal being connected to a constant voltage through a capacitor and to the amplifier output through the resistor. The apparatus includes a circuit for generating a voltage ramp, after a write operation; a circuit for discharging an initial current in the read head proportionally to the voltage ramp between the beginning of the ramp and a first threshold voltage of the ramp; a switch for shorting the resistor to a low value, at least between the first threshold voltage and a second ramp threshold voltage; and a detector for detecting the second threshold voltage and for providing, in the vicinity of the threshold, a progressive control of the switch.

Abstract: A circuit for generating non-overlapping complementary clock signals at a double frequency from an input clock signal. An NAND flip-flop (2) has complementary outputs on which double frequency signals are available. A D-type flip-flop (3) receives on its clock input (H) one of the outputs of the NAND flip-flop, and has its output (Q.sub.D) coupled to its data input (D) through an inverter. Two Exclusive OR gates (XO1, XO2) receive on their first inputs the input clock signal and its complement, respectively, and on their second input the output of the D-type flip-flop. The outputs of the OR gates are connected to the inputs (E1 and E2) of the NAND flip-flop, respectively.

Abstract: The instant invention relates to a test structure for an integrated circuit for determining the incidence of various conduction effects on given layers and separating the surface effects from the wedge effects and the periphery effects into two perpendicular directions, wherein test patterns of determined shapes are incorporated into elementary components comprising the given layers transversely polarized, further comprising at least four test patterns (11, 13, 15, 17) in which the given layers are delimited according to four rectangles, each of which has a common dimension with another one, that is, those four rectangles have only two length values (YD) and two width values (XD).